Can the ARM core access the DDDR3 memory?

Question

I'm using an ADSP-SC573 with an external DDR3 memory. 
 I have successfully written a memory test in Core 1 where I write different values from memory position 0x80000000 and forward. 
 But when I run it in Core 0 (Cortex A5) if hangs when I try to write to the memory. Execution jumps to Data Abort exception handler (adi_rtl_data_abort_hndlr).

ADIApproved · Accepted Answer

Hi, By default external memory is divided and accessed as follows: Address from 0x80000000 to 0x88FFFFFFu(144MB) for SHARC Cores Address from 0x89000000 to 0x8FFFFFFF(112MB) for ARM core So, you are trying to use the SHARC cores region from ARM core. If still you want to use this address region, please follow below steps: 1. Open Project Arm core > system > linker > apt.c file 2. Change #elif defined(__ADSPSC573__) { 0x80000000u, 0x88FFFFFFu, SHARC_L3 }, /* 144MB DDR-A */ { 0x89000000u, 0x8FFFFFFFu, ADI_MMU_WB_CACHED }, /* 112MB DDR-A */ #endif /* __ADSPSC572__ || __ADSPSC573__ */ to #elif defined(__ADSPSC573__) { 0x80000000u, 0x88FFFFFFu, ADI_MMU_RW_UNCACHED }, /* 144MB DDR-A */ { 0x89000000u, 0x8FFFFFFFu, ADI_MMU_WB_CACHED }, /* 112MB DDR-A */ #endif /* __ADSPSC572__ || __ADSPSC573__ */ Regards, Anand Selvaraj

ADIApproved · Answer

Hi,

You can test the whole DDR3 memory in Core 1. Please refer below example for ddr test:
<Installation path>\ADSP-SC5xx_EZ-KIT_Lite-Rel2.0.2\ADSP-SC5xx_EZ-KIT\Examples\Power_On_Self_Test\EZ-Board\sc573…

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Can the ARM core access the DDDR3 memory?

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