Can the ARM core access the DDDR3 memory?

Hi,

By default external memory is divided and accessed as follows:

Address from 0x80000000 to 0x88FFFFFFu(144MB) for SHARC Cores        
Address from 0x89000000 to 0x8FFFFFFF(112MB) for ARM core   

So, you are trying to use the SHARC cores region from ARM core.

If still you want to use this address region, please follow below steps:
1. Open Project Arm core > system > linker > apt.c file 2. Change #elif defined(__ADSPSC573__)
    { 0x80000000u, 0x88FFFFFFu, SHARC_L3                    }, /* 144MB DDR-A */
    { 0x89000000u, 0x8FFFFFFFu, ADI_MMU_WB_CACHED           }, /* 112MB DDR-A */
#endif /* __ADSPSC572__ || __ADSPSC573__ */

 to

#elif defined(__ADSPSC573__)
    { 0x80000000u, 0x88FFFFFFu, ADI_MMU_RW_UNCACHED         }, /* 144MB DDR-A */
    { 0x89000000u, 0x8FFFFFFFu, ADI_MMU_WB_CACHED           }, /* 112MB DDR-A */
#endif /* __ADSPSC572__ || __ADSPSC573__ */

Regards,
Anand Selvaraj

Thank you.

Then I wonder if it is wrong to test the whole DDR3 memory in Core 1 as following:

#define DDR_START 0x80000000
#define DDR_END 0x9FFFFFFF // For my board (4Gb = 536870912 byte)
//#define DDR_END 0x8FFFFFFF // For ADZS-SC573-EZLITE board (2Gb = 268435456 byte)
#define STEP 1024

const uint8_t pattern[] = {0xff, 0x55, 0xaa, 0x00};
uint32_t errors = 0;

printf("START!\n");

for (uint8_t i = 0; i < 4; i++)
{
  // Fill DDR3 with pattern
  for (uint32_t a = DDR_START; a <= DDR_END; a += STEP)
  {
    *(volatile uint8_t *)a = pattern[i];
  }

  // Verify pattern in DDR3
  for (uint32_t a = DDR_START; a <= DDR_END; a += STEP)
  {
    if (*(volatile uint8_t *)a != pattern[i])
    {
      // Found an error
      errors++;
    }
  }
}

if (errors == 0)
{
  printf("DDR3 OK\n");
}
else
{
  printf("DDR3 failure\n");
}

Hi,

You can test the whole DDR3 memory in Core 1. Please refer below example for ddr test:
<Installation path>\ADSP-SC5xx_EZ-KIT_Lite-Rel2.0.2\ADSP-SC5xx_EZ-KIT\Examples\Power_On_Self_Test\EZ-Board\sc573\sharc

Regards,
Anand Selvaraj.