lower DDR2 clock will cause DDR2 read/write error

Hi

IDE: VDSP5.12

DSP: ADSP-21469

DDR2:K4T51163QN/QJ/QQ   DDR2800-5-5-5

CCLK:450MHz

If I use DCLK(DDR clock) 225Mhz(1/2 CCLK), then DDR2 read and write test normally, 

but If I use DCLK(DDR clock)150Mhz(1/3 CCLK), then DDR2 read and write test sometimes go wrong.

I don't understand why would cause this kind of error.

From my understanding, the slower DCLK just decreases the speed of DDR2, Am I correct? 

So If DCLK is 150Mhz will conflict or affect by another same frequency peripherals?