SC589 Maximum SPORT SCLK frequency

Hello Graham,

As you correctly state, for an externally generated clock, the maximum supported clock rate is indeed 31.25MHz.

That said, as per Table 29, Page 81, you can transmit over the SPORT at up to 62.5MHz, when the SPORT clock is internally generated (programmed). 

I hope this helps.

Best regards,

MKB

Hello mkokaly 

Actually I hadn't realised that the external/programmed clock maximums were different, thanks for pointing that out. 

Graham

I Have been advised that An Sport can Transmit Data at 62.5MHz  but only 1/2 that for receive

Even though the Clock is internally generated FS and SCLK  . 

I Have been advised that An Sport can Transmit Data at 62.5MHz  but only 1/2 that for receive

Even though the Clock is internally generated FS and SCLK  . 

That´s only partly correct. For internally generated clocks, the maximum supported clock rate is indeed 31.25MHz for receiving.

BUT, when clokcs are externally generated, the maximum supported clock rate is 62,5MHz for receiving.

It´s exactly the opposite as when transmitting. Please refer to the Table 29, Page 81, of the device datasheet (here is an excerpt highlighting SPORT specs):

Best regards,

MKB

yes true , however if your interfacing to a device- chip in full duplex. that typically has FS, SDI,SDO,BCLK

then you have to have both tx and rx at the same rate . As such 31.25mhz is the highest possible

But you could achieve 62.5MHz in both directions, if you configure the clock to be internally generated for the transmitter, while being externally generated for the receiver. 

So you mean use the Sports in 1/2 duplex

So that would mean i need to receive on Sport1 (external clock) , and then Transmit on a different Sport2. And then SYNC Sport2 to actually get its Clock from Sport1 (external clock) Pins.

In my case I am using nearly all the available SPORTS in Full Duplex. So this option is not viable unless there is some trick I am missing.

Thanks

You could use a single SPORT for full-duplex operation, by combining two half SPORTs (HSPORT). Please refer to the HRM Serial Port chapter for more details on this. Specifically, check out the Architectural Concepts and Multiplexer Logic sections (Page 34-12).

ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference (Rev 1.0)