Table 29 page 81 of the ADSP-SC589 datasheet indicates that the maximum SPORT SCLK frequency (fSPRCLKEXT and fSPRCLKPROG) is 31.25 MHz.
For 16 bit audio data at 48000KHz sampling rate this would restrict each SPORT to 64 channels which seems a bit low when the maximum number of channel supported is 1024.
Also the restriction is given where fSPRCLKEXT <= fSCLK0 where fSCLK0 can be 125MHz.
Is it possible to externally clock the SPORT TX line at more than 31.25 MHz?
As you correctly state, for an externally generated clock, the maximum supported clock rate is indeed 31.25MHz.
That said, as per Table 29, Page 81, you can transmit over the SPORT at up to…
That said, as per Table 29, Page 81, you can transmit over the SPORT at up to 62.5MHz, when the SPORT clock is internally generated (programmed).
I hope this helps.
Actually I hadn't realised that the external/programmed clock maximums were different, thanks for pointing that out.
I Have been advised that An Sport can Transmit Data at 62.5MHz but only 1/2 that for receive
Even though the Clock is internally generated FS and SCLK .
That´s only partly correct. For internally generated clocks, the maximum supported clock rate is indeed 31.25MHz for receiving.
BUT, when clokcs are externally generated, the maximum supported clock rate is 62,5MHz for receiving.
It´s exactly the opposite as when transmitting. Please refer to the Table 29, Page 81, of the device datasheet (here is an excerpt highlighting SPORT specs):
yes true , however if your interfacing to a device- chip in full duplex. that typically has FS, SDI,SDO,BCLK
then you have to have both tx and rx at the same rate . As such 31.25mhz is the highest possible