MDMA stall with ADSP-SC589

I do MDMA with an ADSP-SC589 on two channels, once with DMA8/DMA9 once with DMA18/DMA19 both transferring data from SHARC+ core1 L1 memory to L2 system memory.

As the DMA transfer ist register base the start trigger is given by a write to the Config register of the apropriate MDMA channels.

I configure the SPU accordingly and use the system memory map to access SHARC+ L1 memory width the DMA channel. Interrupts for IRQerr and IRQdone are installed and active.

After system start I see both MDMA working for a short while. Then, DMA18/DMA19 stops transferring data, investigating the STAT register of the destination channel DMA19 showing a run status that is still 2, which means DATA TRANSFER, while the source channel's STAT register DMA18 indicates a RUN status of 0 (STOP/IDLE --> completed).

Do you have any clue how I can prevent a stall like that?