ADZS-21569-EZ-KIT: why is VDD_REF coming from a ($$) 1.8V linear reg. when ADP5054 is already generating 1.8V?

I am working on a 21569 based design, using the EZ-KIT as a reference for a lot of things.

When it comes to power supplies, I am confused as to why the VDD_REF supply is coming from a pretty expensive low noise linear regulator when the main 4 output switching supply (ADP5054) is already generating a 1.8V supply (which is actually being used for almost nothing in the system).

I don't see anything in the datasheet about VDD_REF needing to be ultra low noise or anything like that.

Is there some good reason why this is done? I would just figure to use the 1.8V coming from the ADP5054 for VDD_REF.

  • 0
    •  Analog Employees 
    on May 8, 2020 11:19 AM

    Hi,

    We would suggest you to have a look at EE-414 application note, It describes how to estimate power consumption on ADSP-2156x processors, which include a SHARC+® high-performance core and a multitude of peripherals, accelerators and high-speed Direct Memory Access (DMA) channels. These processors have multiple power and clock domains. This application note provides a simplified methodology for estimating the total System-on-Chip (SoC) power consumption depending on the amount of processor activity.

    Please find the EE-414 application note from below link,
    www.analog.com/.../ee414v01.pdf

    Regards,
    Anand Selvaraj.

  • Anand,

    I have read that appnote - my question is not regarding power consumption (VDD_VREF current is <150mA even in the aggressive example shown). I am wondering why VDD_VREF is powered through an expensive +1.8V 2.5A low noise linear regulator instead of the +1.8V coming from the switching supply (AD5054) which is almost unused. Usually when you see something like this, you think "there must be a reason for this design decision", but I don't see what it is. And since the EZ-KIT is the only reference for design, I wanted clarification in case there is something I am missing with respect to VDD_VREF supply requirements.

    It is of course possible that the design is like that "just because" and VDD_VREF can basically come from any old +1.8V supply... which is fine, I would just like to know.

  • 0
    •  Analog Employees 
    on May 15, 2020 1:00 PM in reply to InoJosh

    Hi,

    In ADZS-21569-EZ-KIT used Quad Buck Regulator ADP5054 has capable of supplying power to 1_8V and VDD_VREF power rails.
    Your custom design you can take both the power rails from same power source.

    Regards,
    Anand Selvaraj.

  • Hello

    I have the same question as InoJosh's original question.  Why does are the VDD_REF pins have two power supplies feeding it (i.e. from the regulator chips U46 and VR3)?  Like InoJosh, I am worried that I am missing some important subtlety.

    Also, is there a reason that the 1.8V supply is fed into the DSP via two parallel filter circuits (which incorporate FER11 and FER 18), each feeding into the two adjacent pads L19 and L20.  I am also unclear why pads L18, L19 and L20 are labeled VREF_N_ADC, VDD_A and VREF_P_ADC respectively on the EZKIT drawing (where as on the data sheet these are GND, VDD_REF and VDD_REF respectively).

    If you could just let me know whether there is a particular reason for these things or whether they are simply mistakes this would put my mind at rest. Thanks.

  • 0
    •  Analog Employees 
    on Mar 8, 2021 7:07 AM in reply to Stephen@orgtec

    Hi,

    Please refer the EV-21569-SOM board design data base from below link,

    www.analog.com/.../EV-21569-SOM.html

    The VDD_REF power supply is feed from single power source and the pads L19, L20 were directly connected to VDD_REF power supply.

    Regards,
    Anand Selvaraj.