Config SPORT to receive UART Data in ADSP-21489 - High Baud Rate Application.

Dear All,

Looking for help on Configuring the SPORT of ADSP-21489 to receive UART Data at Baud Rate of 921600. The Application note says that above 115200 baud rate the Data may not be possible to receive hence I tried using Precision Clock Generator to generate to generate precise clock for SPORT - Recevie Clock. UART data line (Tx) is connected to SPORT-Receive Data Line as well as SPORT Receive Frame Sync. Code is below . 

It is found that with 9600 Baud Rate also some times the received data is corrupted. Similar corrupted data is observed at 921600 baud rate. I tested with ADSP-21489 EZLITE Board & FTDI Hardware to convert TTL to USB to see data on Docklite. 

My questions are: 

1. Is there any wrong setting of SPORT Registers configuration.

2. Is there any wrong setting of SPORT Registers hence the configuration is error prone. 

3. Is there any need to use Pull-Up resistors on DAI pins connected to SPORT Data and Sync Lines

4. Is it recommended to use SPORT with PCG as UART for UART communication with 921600 baud rate.

5. What is the possible design to use SPORT as UART being my application needs total of 06 numbers of UART ports with 921600 Baud Rate.

#define SPORT_UART_BAUDRATE 9600

#define TxCLKDIV 200000000/SPORT_UART_BAUDRATE
#define RxCLKDIV 200000000/(SPORT_UART_BAUDRATE*3)

void Init_SPORT(void);
void SPORT0_Transmit(unsigned char tx1);
unsigned char SPORT1_Receive(void);
void InitPCG(void);
void ConfigSRU(void);

char __argv_string[] = "";

void main(int argc, char *argv[])
{
unsigned char RxData; // to receive data from SPORT1 through UART Config

adi_initComponents();
ConfigSRU();
Init_SPORT();

while(1)
{
SPORT0_Transmit(0xAA); // Transmits the Data - 0xAA :: see this data on Docklite in PC.
RxData=SPORT1_Receive(); // Waits here to receive data through UART (may be from Docklite in PC) then only proceeds to below code...
if(RxData !=0xCD)
{
SPORT0_Transmit('*');
printf("%x", RxData);
}
SPORT0_Transmit(RxData); // Data received through SPORT-UART is sent back to sender (may be Docklite)
}
}

void ConfigSRU(void)
{

/* SPORT-0 Pins Config */
SRU(HIGH,PBEN02_I); //Enable Pin-Buffer so that DAI-Pin-2 act as SPORT-0-UART Transmit Data Pin. Tx-Output from ADSP
SRU(SPORT0_DA_O,DAI_PB02_I); //SPORT0 Data Pin is connected to DAI-Pin-2 as SPORT-0-UART Transmit Data Pin. Tx-Output from ADSP

/* SPORT-1 Pins Config */
SRU(LOW,PBEN04_I); //Disable Pin-Buffer so that DAI-Pin-4 act as SPORT-1-UART Receive Data Pin. Rx-Input to ADSP
SRU(DAI_PB04_O,SPORT1_DA_I); //DAI-Pin-4 is connected as SPORT1 Data Pin which is configured to received data. Receive Data Pin.

/* SPORT-0,1 and PCG Pins Config */
InitPCG();

SRU(PCG_CLKA_O,SPORT0_CLK_I); //SPORT-0_CLK_I is same as SPORT0_CLK_O.
SRU(PCG_CLKB_O,SPORT1_CLK_I); //SPORT-1_CLK_I is same as SPORT1_CLK_O.

SRU(DAI_PB04_O,SPORT1_FS_I); //SPORT-1 Frame Sync is connected to DAI-Pin-4.

}

void InitPCG(void)
{
unsigned char n;
/*Disable PCG = Clearing the PCG Enable Bits in order to Config PCG */
*pPCG_CTLA0 = 0x00;
*pPCG_CTLB0 = 0x00;
// Wait minimum 16 cycles after disable the PCG
for (n=0; n<100; n++)
{
      asm("NOP;");
}

/*PCG CLK generation */
*pPCG_SYNC1 = (*pPCG_SYNC1) | 0x00000004;
*pPCG_SYNC1 = (*pPCG_SYNC1) | 0x00040000;

*pPCG_CTLA1 = TxCLKDIV & CLKADIV;
*pPCG_CTLB1 = RxCLKDIV & CLKBDIV;

/*Enable PCG = Setting the PCG Enable Bits in order to Config PCG */
*pPCG_CTLA0 = ENCLKA;
*pPCG_CTLB0 = ENCLKB;

}


void Init_SPORT()
{
     *pSPCTL0 = 0;
      *pSPCTL1 = 0;


     *pSPCTL0=SPEN_A | SLEN11 | CKRE | FSR | IFS | LFS | LAFS | SPTRAN | LSBF; //SPORT-0 Transmit with PCG Clock
      *pSPCTL1=LAFS | LFS | FSR | SLEN29 | SPEN_A | CKRE;  // SPORT-1 as Receiver with PCG Clock

}


unsigned char SPORT1_Receive(void)
{
unsigned char ch;
unsigned int temp, value=0;

while((*pSPCTL1 & (RXS0_A | RXS1_A))==0);
temp = *pRXSP1A;

value+= ((temp>>23) &(1<<0));
value+= ((temp>>19) &(1<<1));
value+= ((temp>>15) &(1<<2));
value+= ((temp>>11) &(1<<3));
value+= ((temp>>7) &(1<<4));
value+= ((temp>>3) &(1<<5));
value+= ((temp<<1) &(1<<6));
value+= ((temp<<5) &(1<<7));
ch=(unsigned char)value;

return ch;

}

void SPORT0_Transmit(unsigned char tx1)
{
unsigned short int tx=0x00;
unsigned char temp=0;

unsigned short int Ms1= 0x03FC;
unsigned short int Ms2= 0x0401;

tx = tx1;
tx= tx<<2;
tx = tx & Ms1;
tx = tx | Ms2;
while((*pSPCTL0 & (DXS0_A | DXS1_A)) !=0);
*pTXSP0A = tx;
}

  • /*****************************************************************************
     * SPORT_as_UART_v1.c
     *****************************************************************************/
    
    #include <sys/platform.h>
    #include "adi_initialize.h"
    #include "def21489.h"
    #include "sru.h"
    #include<stdio.h>
    
    #define SPORT_CLK_FROM_PCG
    //#define SPORT_CLK_FROM_SPORT
    
    #define SPORT_UART_BAUDRATE  9600
    
    #define	TxCLKDIV  200000000/SPORT_UART_BAUDRATE
    #define RxCLKDIV  200000000/(SPORT_UART_BAUDRATE*3)
    
    void Init_SPORT(void);
    void SPORT0_Transmit(unsigned char tx1);
    unsigned char SPORT1_Receive(void);
    void InitPCG(void);
    void ConfigSRU(void);
    
    char __argv_string[] = "";
    
    void main(int argc, char *argv[])
    {
    	unsigned char RxData; // to receive data from SPORT1 through UART Config
    
    	adi_initComponents();
    	ConfigSRU();
    	Init_SPORT();
    
    	while(1)
    	{
    		SPORT0_Transmit(0xAA);              // Transmits the Data - 0xAA :: see this data on Docklite in PC.
    		RxData=SPORT1_Receive();                // Waits here to receive data through UART (may be from Docklite in PC) then only proceeds to below code...
    		if(RxData !=0xCD)
    		{
    			SPORT0_Transmit('*');
    			printf("%x", RxData);
    		}
    		SPORT0_Transmit(RxData);                // Data received through SPORT-UART is sent back to sender (may be Docklite)
    	}
    }
    
    void ConfigSRU(void)
    {
    
    /* SPORT-0 Pins Config */
    	SRU(HIGH,PBEN02_I);             //Enable Pin-Buffer so that DAI-Pin-2 act as SPORT-0-UART Transmit Data Pin. Tx-Output from ADSP
    	SRU(SPORT0_DA_O,DAI_PB02_I);    //SPORT0 Data Pin is connected to DAI-Pin-2 as SPORT-0-UART Transmit Data Pin. Tx-Output from ADSP
    
    /* SPORT-1 Pins Config */
    	SRU(LOW,PBEN04_I);              //Disable Pin-Buffer so that DAI-Pin-4 act as SPORT-1-UART Receive Data Pin. Rx-Input to ADSP
    	SRU(DAI_PB04_O,SPORT1_DA_I);    //DAI-Pin-4 is connected as SPORT1 Data Pin which is configured to received data. Receive Data Pin.
    
    /* SPORT-0,1 and PCG Pins Config */
    	InitPCG();
    
    	SRU(PCG_CLKA_O,SPORT0_CLK_I);       //SPORT-0_CLK_I is same as SPORT0_CLK_O.
    	SRU(PCG_CLKB_O,SPORT1_CLK_I);       //SPORT-1_CLK_I is same as SPORT1_CLK_O.
    
    	SRU(DAI_PB04_O,SPORT1_FS_I);    //SPORT-1 Frame Sync is connected to DAI-Pin-4.
    
    }
    
    void InitPCG(void)
    {
        unsigned char n;
        /*Disable PCG = Clearing the PCG Enable Bits in order to Config PCG */
        *pPCG_CTLA0 = 0x00;
        *pPCG_CTLB0 = 0x00;
        // Wait minimum 16 cycles after disable the PCG
    	for (n=0; n<100; n++)
        {
            asm("NOP;");
        }
    
        /*PCG CLK generation */
    	*pPCG_SYNC1 = (*pPCG_SYNC1) | 0x00000004;
    	*pPCG_SYNC1 = (*pPCG_SYNC1) | 0x00040000;
    
        *pPCG_CTLA1 = TxCLKDIV & CLKADIV;
        *pPCG_CTLB1 = RxCLKDIV & CLKBDIV;
    
        /*Enable PCG = Setting the PCG Enable Bits in order to Config PCG */
        *pPCG_CTLA0 = ENCLKA;
        *pPCG_CTLB0 = ENCLKB;
    
    }
    
    
    void Init_SPORT()
    {
        *pSPCTL0 = 0;
    	*pSPCTL1 = 0;
    
    	//*pDIV0 = 0x003F0000|(CLKDIV0<<1);		/*Divisor register for FS and CLK*/
    	//*pDIV1=CLKDIV1<<1;
    
    	//*pSPCTL0=SPEN_A | SLEN11 | ICLK | CKRE |  FSR | IFS | LFS | LAFS  | SPTRAN | LSBF;   //SPORT-0  Transmit
    	*pSPCTL0=SPEN_A | SLEN11 | CKRE |  FSR | IFS | LFS | LAFS  | SPTRAN | LSBF;   //SPORT-0  Transmit
    
    	//*pSPCTL1=LFS|FSR|SLEN27|SPEN_A | CKRE;
    	//*pSPCTL1=LAFS | LFS | FSR | ICLK | SLEN27 | SPEN_A | CKRE;
    	*pSPCTL1=LAFS | LFS | FSR | SLEN29 | SPEN_A | CKRE;
    
    }
    
    
    unsigned char SPORT1_Receive(void)
    {
    	unsigned char ch;
    	unsigned int temp, value=0;
    
    	while((*pSPCTL1 & (RXS0_A | RXS1_A))==0);
    	temp = *pRXSP1A;
    
    	value+= ((temp>>23) &(1<<0));
    	value+= ((temp>>19) &(1<<1));
    	value+= ((temp>>15) &(1<<2));
    	value+= ((temp>>11) &(1<<3));
    	value+= ((temp>>7) &(1<<4));
    	value+= ((temp>>3) &(1<<5));
    	value+= ((temp<<1) &(1<<6));
    	value+= ((temp<<5) &(1<<7));
    	ch=(unsigned char)value;
    
    	return ch;
    
    }
    
    void SPORT0_Transmit(unsigned char tx1)
    {
    	unsigned short int tx=0x00;
    	unsigned char temp=0;
    
    	unsigned short int Ms1= 0x03FC;
    	unsigned short int Ms2= 0x0401;
    
    	tx = tx1;
    	tx= tx<<2;
    	tx = tx & Ms1;
    	tx = tx | Ms2;
    	while((*pSPCTL0 & (DXS0_A | DXS1_A)) !=0);
    	*pTXSP0A = tx;
    }
    
    
    

  • 0
    •  Analog Employees 
    on Jun 8, 2019 12:10 PM in reply to Muni
    Hi Muni,
    Sorry for the delayed response.

    >> In "sport_init function" external bit clock and internal frame sync is enabled. But the FSDIV value is not programmed. Can you able to send and receive data? If both the sender and receiver operate at different baud rate, you can get the corrupted data.

    Regarding" Is there any need to use Pull-Up resistors on DAI pins connected to SPORT Data and Sync Lines"    

    >> There is internal pull-up (ipu) for all the DAI and DPI pins of ADSP-214xx processors. These resistors are designed to hold the internal path from the pins at the expected logic levels. To pull-up or pull-down the external pads to the expected logic levels, use external resistors.
    Internal pull-up/pull-down resistors cannot be enabled/disabled and the value of these resistors cannot be programmed. The range of an ipu resistor can be between 26 kΩ–63kΩ.

    Regarding". Is it recommended to use SPORT with PCG as UART for UART communication with 921600 baud rate."

    >> You can use PCG for SPORT clock,so that you can get accurate frequency or baud rate and get less error rate. Try to run SPORT and UART at same frequency or baud rate. So that you can send and receive proper data.

    Can you please let me know, at what frequency you are running the CCLK and PCLK ?
    However I would suggest you to refer (page no 833 / 1304) Table 21-3 in ADSP-21489 HRM on generating a baud rate of 921600 at 266,300,350,400 and 450 CCLK frequencies.Once you able to receive the data with 9600 Baud Rate in a single UART then you may proceed for more.
    Please find the HRM form the below link,