I am refactoring some VisualDSP C code for a ADSP-21262 processor. In looking at the assembly output from the C compiler, I can see that my refactoring is generating some indirect addressing that was originally direct addressing.
I am trying to make sure that the changes I am making don't affect the performance of the application. I have looked through Instruction reference manual, and the hardware manual, and I can't find timing information on the different addressing modes. I'm inclined to believe that the Address Generator can do the indirect addressing at the same speed as direct addressing, but I would like to verify this.
Is there a difference in timing between direct addressing, and indirect addressing, in the 21262 (SHARC family) processor?
e.g. is DM(n) the same timing as DM(n, m)?
