SHARC Processors

Q&A

by Shark111
SHARC Processors

Latest 17 hours ago by Santhakumari
501 9 0
Answered
Converting VisualDSP++ project to CCES project 0
Answered

I have a VisualDSP++ (Version 5.1.2.0) project written in assembly for part ADSP-21489. We recently switched to CrossCore Embedded Studio V2.12.1.0, and used t he Project Import Wizard to convert the VisualDSP++ project to CCES project, which was compiled...

Audio Signal Processors software adsp-21489 VDSP++ V5.1.2.0 CCES V2.12.1.0 SHARC Audio Processors/SoCs Show More

501 9 0
by JohnG2024
SHARC Processors

Latest 2 days ago by JohnG2024
232 4 0
Answered
Is there a optimized Q1_23 to float function thats faster than the conv_RtoF() builtin function for SHARC+ 0
Answered

I am wondering if there is a faster way to convert integer to float if it is known to be Q1.24 format numbers, as compared to the builtin_conv_RtoF which handles 32 bits input ?

Audio Signal Processors software SHARC Audio Processors/SoCs adsp-21593

232 4 0
by Mike33
SHARC Processors

Latest 1 month ago by Mike33
108 2 0
Answered
MDMA Stall 0
Answered

Hi team, I am trying to excute mdma from L1 memory to SMC interface which is connected to FPGA. In my test code mdma works fine, but in the target program mdma stalls. Registers right after mdma requested: DMA8: CFG 04000201 STAT 00006000 AddrStart...

Audio Signal Processors hardware SHARC Audio Processors/SoCs ADSP-21587 mdma Show More

108 2 0
by ssirri
SHARC Processors

Latest 2 months ago by NandiniC
96 1 0
Answered
Datasheets give conflicting specifications about temperature range +1
Answered

Hello I was looking for ADSP-21489BSWZ-4B DSP for one of my projects but I encounter conflicting information in datasheets of products. In the datasheet dated 2012 this product is listed as -40 to +85 degrees celcius, however in the datasheet dated...

Audio Signal Processors Datasheet/Specs adsp-21489 ADSP-21489BSWZ-4B adsp21489 21489 SHARC Audio Processors/SoCs Show More

96 1 0
by hiro.sp
SHARC Processors

Latest 2 months ago by NandiniC
130 3 0
Suggested Answer
SC589_EZ-BOARD uses DDR3 with series termination, Why? 0
Suggested Answer

I'm confused. SC589_EZ-BOARD uses DDR3 with series termination, so why is the VTT termination method not used? Also, the technical note EE-387 does not mention VTT termination at all. Previously, I was using DDR3 with the SC584, which used series...

ddr3 hardware sharc dmc adsp-sc589 Processors & Microcontrollers Processors and Microcontrollers Heterogeneous Multicore Processors Show More

130 3 0
by EricSa
SHARC Processors

Latest 2 months ago by NandiniC
214 2 0
Not Answered
SPORT primary and secondary on EV-SOMCRR-EZLITE +1
Not Answered

Hey together, we have the ADSP-21569 SOM with the EV-SOMCRR-EZLITE and we want to understand the SPORT handling more in detail. So far we are able to run the example code for the ADAU1372 and receive and transmit 2 channels from and to the mini jacks...

ADSP-21569 Audio Signal Processors software CCES 2.12.1 SHARC Audio Processors/SoCs Audio CODECs Show More

214 2 0
by MichaelF91
SHARC Processors

Latest 3 months ago by NandiniC
169 2 0
Answered
Understanding adi_spdif_Rx_EnableAutoAudioRestart 0
Answered

The hardware reference manual on p. 1257 states the following: Interrupted Data Streams on the Receiver When using the S/PDIF receiver with data streams that are likely to be interrupted, (in other words unplugged and reconnected), it is necessary to...

software ADSP21565

169 2 0
by MichaelF91
SHARC Processors

Latest 3 months ago by NandiniC
125 1 0
Answered
Is there a disadvantage to setting SPDIF_RX_CTL.FASTLOCK to 1? 0
Answered

The manual states that enabling fast mode has the "advantage of recovering very quickly whenever the S/PDIF receiver looses lock due to glitches in the signal". What is the disadvantage, or, to phrase it another way, is there ever any reason not to...

Audio Signal Processors software ADSP-21565 SHARC Audio Processors/SoCs

125 1 0
by LeopoldoBudde
SHARC Processors

Latest 3 months ago by LeopoldoBudde
313 2 0
Not Answered
Tx SPORT DMA interruption unaligned with respect to Rx despite same LRCLK and BCLK signals and configs in SHARC-FX ADSP-SC835 +2
Not Answered

Hello, I am working with ADSP-SC835 (SOM + SOMCRR board) and CCES 3.0.2. I have a simple scheme where I receive external LRCLK and BCLK signals, working in TDM4 (multichannel) mode, where SPORT5A receives the input data on both data lines (D0 and D1)...

hardware dma SHARC-FX tdm sport cces-3.0.2 ADSP-SC835 Show More

313 2 0
by DmiSch
SHARC Processors

Latest 4 months ago by DmiSch
1099 7 0
Not Answered
ADSP-21363 SPI DMA exchange issue 0
Not Answered

I am having issue with SPI DMA data exchange. There is two ADSP-21363 connected via SPI. When sub transfers main recieves data but with SPIS=3 in SPIDMAC and RXS=1 in SPISTAT. And when main transfers in response sub does not recieves data with SPIS=3...

Audio Signal Processors adsp-21363 hardware sharc dma spi SHARC Audio Processors/SoCs Show More

1099 7 0
by Robrechtb
SHARC Processors

Latest 5 months ago by NandiniC
240 3 0
Suggested Answer
Using SPI2 and OSPI at the same time 0
Suggested Answer

I am using OSPI to read the flash chip using adi_ospi_DirectRead. At the same time, i am using SPI2 to send a bitstream to an FPGA. When the SPI transactions for both peripherals happen at the same time. The DMA for the OSPI seems to lock up. It never...

Audio Signal Processors ADSP-SC594 software CCES 2.10.1 ospi SHARC Audio Processors/SoCs Show More

240 3 0
by cconrad
SHARC Processors

Latest 6 months ago by kennie
288 2 0
Answered
cfftf() and ifftf() fast complex packing and unpacking 0
Answered

I'm utilizing the optimized radix-2 cfftf() and ifftf() functions in the CCES / SHARC library. These function are leaving me in a lurch because they use separate vectors for real and imaginary components, however there are no corresponding optimized vector...

Audio Signal Processors software sharc cfftf ifftf complex_float to float r adsp-21479 SHARC Audio Processors/SoCs i Show More

288 2 0
by AnilK
SHARC Processors

Latest 7 months ago by NandiniC
876 15 0
Not Answered
DAC to ADC configuration using AD1939 0
Not Answered

Hi, Iam using ADSP21489 board having AD1939 codec in it and coding on visual DSP++. I have question regarding my modem which i implemented modem on ADSP21489 now i send the samples of modulation output to DAC and DAC output connected back to ADC using...

Audio Signal Processors Single Channel A/D Converters hardware adsp-21489 ad1939 adsp21489 21489 sport SHARC Audio Processors/SoCs Audio CODECs Show More

876 15 0
by CommunityWillDisplay
SHARC Processors

Latest 7 months ago by NandiniC
461 3 0
Answered
How can i calculate the instruction time-consuming 0
Answered

Hi, Based on the '21489 AD1939 C Block-Based Talkthru 48 or 96 kHz' routine, I implemented a noise reduction process; However, it stops with a "ProcessingTooLong" error. I know this indicates excessive execution time. How can I determine the actual...

Audio Signal Processors software adsp-21489 Integrated/Special Purpose A/D Converters SHARC Audio Processors/SoCs Audio CODECs Show More

461 3 0
by EricSa
SHARC Processors

Latest 7 months ago by NandiniC
248 1 0
Answered
SHARC In-Field-Update 0
Answered

Hello together, at the moment we are in the evaluation phase of different SHARC DSPs. I have a question regarding the updatebility of SHARC processors in the field. Short explanation of our setup. On our other projects we always have a external MCU...

ADSP-21569 update Audio Signal Processors hardware sharc SHARC Audio Processors/SoCs Show More

248 1 0

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Q&A

Answered
Converting VisualDSP++ project to CCES project 0
Answered

Answered
Is there a optimized Q1_23 to float function thats faster than the conv_RtoF() builtin function for SHARC+ 0
Answered

Answered
MDMA Stall 0
Answered

Answered
Datasheets give conflicting specifications about temperature range +1
Answered

Suggested Answer
SC589_EZ-BOARD uses DDR3 with series termination, Why? 0
Suggested Answer

Not Answered
SPORT primary and secondary on EV-SOMCRR-EZLITE +1
Not Answered

Answered
Understanding adi_spdif_Rx_EnableAutoAudioRestart 0
Answered

Answered
Is there a disadvantage to setting SPDIF_RX_CTL.FASTLOCK to 1? 0
Answered

Not Answered
Tx SPORT DMA interruption unaligned with respect to Rx despite same LRCLK and BCLK signals and configs in SHARC-FX ADSP-SC835 +2
Not Answered

Not Answered
ADSP-21363 SPI DMA exchange issue 0
Not Answered

Suggested Answer
Using SPI2 and OSPI at the same time 0
Suggested Answer

Answered
cfftf() and ifftf() fast complex packing and unpacking 0
Answered

Not Answered
DAC to ADC configuration using AD1939 0
Not Answered

Answered
How can i calculate the instruction time-consuming 0
Answered

Answered
SHARC In-Field-Update 0
Answered

Q&A

Answered Converting VisualDSP++ project to CCES project 0 Answered

Answered Is there a optimized Q1_23 to float function thats faster than the conv_RtoF() builtin function for SHARC+ 0 Answered

Answered MDMA Stall 0 Answered

Answered Datasheets give conflicting specifications about temperature range +1 Answered

Suggested Answer SC589_EZ-BOARD uses DDR3 with series termination, Why? 0 Suggested Answer

Not Answered SPORT primary and secondary on EV-SOMCRR-EZLITE +1 Not Answered

Answered Understanding adi_spdif_Rx_EnableAutoAudioRestart 0 Answered

Answered Is there a disadvantage to setting SPDIF_RX_CTL.FASTLOCK to 1? 0 Answered

Not Answered Tx SPORT DMA interruption unaligned with respect to Rx despite same LRCLK and BCLK signals and configs in SHARC-FX ADSP-SC835 +2 Not Answered

Not Answered ADSP-21363 SPI DMA exchange issue 0 Not Answered

Suggested Answer Using SPI2 and OSPI at the same time 0 Suggested Answer

Answered cfftf() and ifftf() fast complex packing and unpacking 0 Answered

Not Answered DAC to ADC configuration using AD1939 0 Not Answered

Answered How can i calculate the instruction time-consuming 0 Answered

Answered SHARC In-Field-Update 0 Answered

Answered
Converting VisualDSP++ project to CCES project 0
Answered

Answered
Is there a optimized Q1_23 to float function thats faster than the conv_RtoF() builtin function for SHARC+ 0
Answered

Answered
MDMA Stall 0
Answered

Answered
Datasheets give conflicting specifications about temperature range +1
Answered

Suggested Answer
SC589_EZ-BOARD uses DDR3 with series termination, Why? 0
Suggested Answer

Not Answered
SPORT primary and secondary on EV-SOMCRR-EZLITE +1
Not Answered

Answered
Understanding adi_spdif_Rx_EnableAutoAudioRestart 0
Answered

Answered
Is there a disadvantage to setting SPDIF_RX_CTL.FASTLOCK to 1? 0
Answered

Not Answered
Tx SPORT DMA interruption unaligned with respect to Rx despite same LRCLK and BCLK signals and configs in SHARC-FX ADSP-SC835 +2
Not Answered

Not Answered
ADSP-21363 SPI DMA exchange issue 0
Not Answered

Suggested Answer
Using SPI2 and OSPI at the same time 0
Suggested Answer

Answered
cfftf() and ifftf() fast complex packing and unpacking 0
Answered

Not Answered
DAC to ADC configuration using AD1939 0
Not Answered

Answered
How can i calculate the instruction time-consuming 0
Answered

Answered
SHARC In-Field-Update 0
Answered