Re: example C code for SPI receive

Hi Ananth,

              I had posted the summary of the information discussed on the private message here. We may continue any further discussion under this thread only. The SPIF and SPIFE bits are set as soon as the SPI is enabled. They will be cleared when the data transfer is started and again set once the data is transferred completely. In your code, the TX buffer is not written with the new data inside the ISR. That is the reason for the continuous interrupts. The interrupt will be continuously generated as long as the buffer is empty.You must write the data to be transmitted to the TX buffer inside the ISR.

Best Regards,

Jeyanthi

Hi Jeyanthi,

I am not observing the same behavior as you mentioned here. One more thing I have to mention is I am working in emulating mode, with AD emulator.

Once SPIF & SPIFE flags are set, the code is going to the ISR, in the ISR I am loading TXSPI register, this should clear the status FLAGS. But I did not observed any flags getting cleared. Only thing I observed is after loading the TXSPI register RXS status flag is getting set. Is this the correct behavoiur?

Thanks and Regards,

Ananth Kumar.

Hi Ananth,

              The SPIF and SPIFE bits becoming high indicates that the transfer is completed. You may not be able to capture the event when it becomes low. I do not see any issues with the observation you have made. Did you probe the SPI signals to see whether the data is transferred outside or not? I could also see that in the code you have used both the SPI and SPI B. Did you check on whether the data is received by the other SPI?

Best Regards,

Jeyanthi

Hello Jayanthi,

Did you understood my SPI interrupt problem?. Please let me know your comments. Also this issue is little bit urgent.

Regards,

Ananth.

Hello Jayanthi,

My SPI ISR is like this.

void ISR(void)

{

    if ( TXS flag is clear)

    {

        Load the transmit register;      

         if( RXS bit is set)

            Read the Recieve register and load into recieve buffer;

    }

   if( data transmission over)

        Disable the SPI;

}

But with this code, I did not see any data updated into my receive buffers. If I comment the RXS flag checking I can see the data updated, but not in a conistent way(some data miss I can see in the receive buffer). Please guide me on this.

Regards,

Ananth.

Please let me know if any issues are there in this piece of code?

Thanks and Regards,

Ananth Kumar.

Hi Ananth,

              You may initially wait for the count to become zero and then poll for the SPIFE flag. I would also suggest you to use the interrupt for this purpose. If the interrupt is enabled and interrupt is generated when the count becomes zero, Inside the ISR you can disable the SPI by polling the SPIFE bit.

Best Regards,

Jeyanthi

Thank you Jeyanthi. It seems it is working now.

It seems if both the conditions are satisfied (DMA Count ZERO & SPIEF flag set) then only the transmission is completed.

Regards,

Ananth.

Hi  Jeyanthi,

Thank you for your  support.

One more query related  to SPI DMA. I want to use SPI for full duplex operation using DMA mode. And from  the datasheet I understood that DMA can be used either for Transmission or  Reception only.

Please explain me how  to configure SPI in this mode (DMA with full duplex operation).

Thanks and  Regards,

Ananth  Kumar.

Hi Ananth,

             The SPI has only one DMA channel and you cannot use the SPI in full duplex mode using DMA alone. You may need to use the DMA for either transmit/receive purpose. And for the other case you need to use the polling with core mode operation. You may need to poll for the SPISTAT register bits and write to the TX buffer or read from the RX buffer accordingly.

Best Regards,

Jeyanthi