I am using the SPI_Test project which you attached here. I changed the project to make it work on 21469 Evaluation board(ADSP-21469_EZ-Board).
What I observed is that I am getting the SPI interrupts continuously. Eventhough I am not loading any data into the TXSPI registed in the ISR(which I commented), still interrupt is coming. Please let me know if I missing something here. I had attached my code here.
I had posted the summary of the information discussed on the private message here. We may continue any further discussion under this thread only. The SPIF and SPIFE bits are set as soon as the SPI is enabled. They will be cleared when the data transfer is started and again set once the data is transferred completely. In your code, the TX buffer is not written with the new data inside the ISR. That is the reason for the continuous interrupts. The interrupt will be continuously generated as long as the buffer is empty.You must write the data to be transmitted to the TX buffer inside the ISR.
I am not observing the same behavior as you mentioned here. One more thing I have to mention is I am working in emulating mode, with AD emulator.
Once SPIF & SPIFE flags are set, the code is going to the ISR, in the ISR I am loading TXSPI register, this should clear the status FLAGS. But I did not observed any flags getting cleared. Only thing I observed is after loading the TXSPI register RXS status flag is getting set. Is this the correct behavoiur?
Thanks and Regards,
The SPIF and SPIFE bits becoming high indicates that the transfer is completed. You may not be able to capture the event when it becomes low. I do not see any issues with the observation you have made. Did you probe the SPI signals to see whether the data is transferred outside or not? I could also see that in the code you have used both the SPI and SPI B. Did you check on whether the data is received by the other SPI?
Did you understood my SPI interrupt problem?. Please let me know your comments. Also this issue is little bit urgent.
My SPI ISR is like this.
if ( TXS flag is clear)
Load the transmit register;
if( RXS bit is set)
Read the Recieve register and load into recieve buffer;
if( data transmission over)
Disable the SPI;
But with this code, I did not see any data updated into my receive buffers. If I comment the RXS flag checking I can see the data updated, but not in a conistent way(some data miss I can see in the receive buffer). Please guide me on this.