Where is the default IVT of SHARC+ Core located? Can it be changed?

  • The default IVT location at start-up is located in Boot-ROM1 space starting from address 0x500000. This can be remapped to either L1 memory starting from 0x90000 or DDR address space starting from 0x400000 by setting the appropriate bits (IIVT and EIVT, respectively) in the SYSCTL register.

  • The default start-up code in a CCES project remaps the IVT to L1 memory.

  • The previous SHARC core had the option to place the IVT in L1 RAM or L1 ROM by setting the IIVT bit in the SYSCTL register, and the default location was L1 RAM.

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