Is there anything equivalent to External Port DMA (EPDMA) on ADSP-214xx processors available on ADSP-SC58x/ADSP-2158x processors?

Hi. Mitesh.

I have a new problem, I want use SC589+AD1939 to design a target hardware.

I use SC589 adc_dac_player  demo to test.

But whatever i config sport , they are can't be normal.

But strangely. If I comment "PLAY_BACK", just test DAC output , the 3k sine can be heard.

How to Use AD1939 and SC589? 

Hi,

I am attaching a new code (EMDMA_Code_Core2.zip) in the original post which works well on ADSP-SC573 EZ-Kit. I think the missing in your code was that you need to change the offset 0xA000000 to 0xA200000 to access L1 memory of core 2 in system address space.

Hope this helps. For any future thread, I would suggest you to start a discussion thread (against replying to this FAQ) as it allows me to post the codes in my replies.

Thanks,

Mitesh

No, no interrupt occur.  while(uiEMDMA0Count==0);   

I have two ez-kit, I'm now use 573-ezkit. 

*pREG_SPU0_SECUREP112=0x3;

*pREG_SEC0_GCTL=ENUM_SEC_GCTL_EN;
*pREG_SEC0_CCTL1=ENUM_SEC_CCTL1_EN;
*pREG_SEC0_CCTL2=ENUM_SEC_CCTL2_EN;
adi_sec_EnableEdgeSense(INTR_EMDMA0_DONE, true);
adi_int_InstallHandler(INTR_EMDMA0_DONE,EMDMA0_Interrupt_Handler,0,true);//Installing the CRC Compare Error interrupt handler
//adi_sec_EnableEdgeSense(INTR_EMDMA1_DONE, true);
//adi_int_InstallHandler(INTR_EMDMA1_DONE,EMDMA1_Interrupt_Handler,0,true);//Installing the CRC Compare Error interrupt handler

//Initialize the delay line TCB here
uiDelayLineTCB[0]=BITM_EMDMA_CHNPTR_PCI; //CP
uiDelayLineTCB[1]=(uint32_t)uiTapList>>2|0xA000000;//TP
uiDelayLineTCB[2]=TAP_LIST_SIZE; //TC
uiDelayLineTCB[3]=1; //RM
uiDelayLineTCB[4]=BLOCK_SIZE; //RC
uiDelayLineTCB[5]=(uint32_t)uiDestBuff>>2|0xA000000; //RI
uiDelayLineTCB[6]=BUFF_SIZE; //EL
uiDelayLineTCB[7]=DMC0_START_ADDRESS>>2; //EB
uiDelayLineTCB[8]=1; //EM
uiDelayLineTCB[9]=DMC0_START_ADDRESS>>2; //EI
uiDelayLineTCB[10]=BUFF_SIZE;//IC
uiDelayLineTCB[11]=1;//IM
uiDelayLineTCB[12]=(uint32_t)uiSrcBuff>>2|0xA000000;//II

uiEMDMA0Count=0;
EMDMA_CHAIN_CONFIG(0,EMDMA_CTL_VALUE_DELAY_LINE,(((uint32_t)uiDelayLineTCB+12*4)>>2)|0xA000000|BITM_EMDMA_CHNPTR_PCI);

//uiEMDMA1Count=0;
//EMDMA_CHAIN_CONFIG(1,EMDMA_CTL_VALUE_DELAY_LINE,(((uint32_t)uiDelayLineTCB+12*4)>>2)|0xA000000|BITM_EMDMA_CHNPTR_PCI);

//Wait for the DMA interrupt
while(uiEMDMA0Count==0);

//Verify for the data integrity
if(Buf_Compare(uiDestCompareBuff, uiDestBuff, BUFF_SIZE, 4, 0xFFFFFFFF, 1))
{
printf("\n\nFail...");
return 0;
}

printf("\n\nPass...");

You might need to add the following line to the code for core 2 interrupt:

*pREG_SEC0_CCTL2=ENUM_SEC_CCTL2_EN;

does that help? If not, could you please send me a simple code which fails for you?

Thanks,

Mitesh

why sharc core 2 can't get interrupt. Does need to change anything?