Yes, The ARM can access the L1 memory of both the SHARC+ cores in ADSP-SC58x. Both data access and code execution is supported. ARM core can access SHARC+ L1 memory through SHARCs L1 memory multiprocessor addresses alias.
Yes, The ARM can access the L1 memory of both the SHARC+ cores in ADSP-SC58x. Both data access and code execution is supported. ARM core can access SHARC+ L1 memory through SHARCs L1 memory multiprocessor addresses alias.
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I solved my ARM to SHARC write-problem by changing the ARM MMU default settings in the file apt-sc589.c file, .. from Read Only (-RO-) to -RW-. This file is located in the CorsCore ARM-installation parth…