Yes, The ARM can access the L1 memory of both the SHARC+ cores in ADSP-SC58x. Both data access and code execution is supported. ARM core can access SHARC+ L1 memory through SHARCs L1 memory multiprocessor addresses alias.
Yes, The ARM can access the L1 memory of both the SHARC+ cores in ADSP-SC58x. Both data access and code execution is supported. ARM core can access SHARC+ L1 memory through SHARCs L1 memory multiprocessor addresses alias.