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ADSP-SC5xx/ADSP-215xx
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ADSP-SC5xx/ADSP-215xx
Documents Is there a restriction in use of stall count mode and burst length increment in SWU?
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  • +ADSP-SC57x/2157x: FAQ
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  • +CDU: FAQ
  • Custom Error Handler in Booting for SC594
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    • Is there a restriction in use of stall count mode and burst length increment in SWU?
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  • What is the SPORT Latency using DMA between the SHARC cores(Core1 & Core2) for ADSP-SC58x?
  • What is the supported SLCK0 divisor value for ADSP-2156x

Is there a restriction in use of stall count mode and burst length increment in SWU?

Yes, both of them should not be set at the same time. SWU_CTLn.BLENINC should not be set when SWU_CTLn.STALLCNTMODE is set.

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