Yes. The ARM Cortex-A5 processor can access any memory space on the chip including the SHARC L1 memory, the system L2 SRAM and all external memory spaces. The Cortex-A5 processor has access to all peripherals as well.
Hi Harshit,Could you please provide some help regarding enabling DMC1 so that external memory space in ADSP-SC584 is accessable.
I see that DMC0 is configured in PreLoad ELF file which is loaded by default but DMC1 is not, so when external memory region [from 0xC0000000 to 0xFFFFFFFF] is accessed system is halted and needs a reset to recover.
I tried editing the project code, building the preLoad ELF but no luck.
Any help will be deeply appreciated.
As you can see on page 4 of the datasheet in the below link, the DMC1 is not supported for ADSP-SC584 processor.
This is the reason why the preload elf does not initialize the DMC1.
Only ADSP-SC589, ADSP-SC587 and ADSP-21587 has support for two DDR memory.
Hope this helps.
Please let me know if you have any further queries related to this.
Yes that was very helpful. Actually I need to configure Interrupts and for that I need my Interrupt vector table to be placed at 0x00000000 or 0xFFFF0000 for CortexA5 to access it.
Does it mean that 0xFFFF0000 cannot be used and if so, can you please direct me to some example in which IVT is configured. Because if I configure the IVT to be stored at address 0x00000000 in the linkerscript, I get an error during loading.