The FIR and IIR accelerators in ADSP-SC57x/2157x processors is same as in ADSP-SC58x/2158x processors except that former one support "burst mode" (can be enabled by setting the bit BURSTEN in the FIR/IIR global control register) for initial loading of coefficients and delay line(FIR) which improves the overall throughput. For more details refer "ADSP-SC57x SHARC Processor Hardware Reference".