FAQ - Preload code customization for 215XX processors

Overview

 This document explains how to create/modify the preload program for the custom target on ADSP-215XX.

 The following topics are discussed:

     Pre-load Files

     Dynamic Memory Controllers (DMC) configuration

     Default Preload and Initialization Code

     Preload code for any custom board

          Modifying preload code

          Debug configuration

     Summary

 

Pre-load Files

External memory needs to be configured appropriately before applications can be loaded. When the application boots, this is done through initcodes; when the application is loaded to target using the debugger, this can be done by the IDE automatically for simple processors.

For heterogeneous processors such as the ADSP-SC58x processors, more flexibility is required.

The main purpose of these pre-load files is to set up clocks and DMC settings so that the debugger is able to load the user’s application to external memory.

 

Dynamic Memory Controllers (DMC) configuration

The dynamic memory controller (DMC) provides a glueless interface between DDR3/DDR2/LPDDR SDRAMs and the system crossbar interface (SCB). The DMC enables execution of instructions from, as well as transfer of data to and from, DDR3, DDR2 SDRAM or LPDDR SDRAM respectively.

The DMC supports access to the external memory by core and DMA accesses.

Parts with 2 DMCs are: ADSP-SC587,ADSP-SC589,ADSP-21587

Parts with 1 DMCs are: ADSP-SC584,ADSP-SC583,ADSP-SC582,ADSP-21584,ADSP-21583,ADSP-SC573,ADSP-SC572,ADSP-21573

Parts with 0 DMCs are: ADSP-SC571,ADSP-SC570,ADSP-21571

 

Default Preload and Initialization Code

The CCES installation provides the source code and project files of preload and initialization code for ADSP-215XX processors in the directory:

[CCES_Install]/ CrossCore Embedded Studio 2.6.0/SHARC/ldr/init_code/215xx_Init

 

Preload code for any custom board

The CGU and DMC settings in the default preload and initialization source code may need to be modified for the following conditions:

  1. When using the EZ-Board (or a custom board with the same DDR memory device as that populated on the EZ-Board) with non-default CGU settings.
  2. When using a custom board with a different memory device.

Modifying preload code:

  1. Open the preload code for the necessary part from the latest CCES installation.

[CCES_Install]/ CrossCore Embedded Studio 2.6.0/SHARC/ldr/init_code/215xx_Init

  1. Change the project setting from "C/C++ Build > Settings > Processor Settings” to match the processor on the custom board.
  2. If your custom hardware uses different CLKINx than that used in the EZ-KITS (25MHz) you must modify this value in the sc5xx_init.h file.
  3. If your custom hardware uses the same DDR as one of these EZ-KITS you can define the CONFIG macros as mentioned below in config.h file available in "src" subdirectory.

For 2 DMCs:

#define CONFIG_DMC0 Micron_2Gb_DDR3_MT41K128M16JT

#define CONFIG_DMC1 Micron_2Gb_DDR3_MT41K128M16JT

#define CONFIG_CORE_CLOCK_SPEED 450000000u

 

For 1 DMC:

#define CONFIG_DMC0 Micron_2Gb_DDR2_MT47H128M16

#define CONFIG_DMC1 DMC_NONE

#define CONFIG_CORE_CLOCK_SPEED 450000000u

  1. By default DMC register values are for the Memory on EZ-KIT. For different memory, use "DMC_Registers_List.xlsx" sheet to provide input memory parameters and generate DDR register values. Update the sc58x_init.c with the new values.
  2. Now build the code and customized preload .dxe is generated.

Note: Unlike preload code, initialization code is actually a part of the application. Pre-load files should be used only during emulation. Do not use pre-load files when building bootable LDR files. To run from flash, the corresponding initcode file (created from the same source files as the pre-load file) ought to be selected in the initialization section while creating the loader file.

 

Debug Configuration:

Preloads are only added automatically to Debug Configurations when there is an EZ-Kit available for the selected processor (ADSP-SC584, ADSP-SC589, ADSP-SC573). If no EZ-Kit is available, no preload is specified by default as the configuration performed by the preload will need to be tailored to your custom hardware, for which the default one may not be appropriate.

Follow the below steps:

  1. Select the project and choose: Debug As > Debug Configurations from the context menu

        The Run/Debug Configurations dialog box appears.

  1. Click on ‘Application with CrossCore Debugger’, then on the ‘New’ button, and proceed with the wizard.
  2. The Session tab is selected by default as shown below.
  3. Click Add, by selecting "Device 0 [Core 1]".

    The "Select a program to load" dialog box appears.

  1. Choose the project, make sure “Reset core before load” is checked and "Check silicon revision before load" is NOT unchecked. Click OK.

       

  1. Preload program is being loaded prior to Core1 application, so click "Move up" by selecting preload code.
  2. Select Core 1 application and click Edit. Make sure “Reset core before load” is NOT checked. If this is checked, it will undo the preload settings.
  3. Click Apply and Debug.
  4. Modification of SHARC ldf is also required, if DMCs changed

For example: ADSP-21587 have 2 DMCs and your custom board only uses DMC0, set DMC1 memory size to 0,under system.svc -> Startup Code/LDF tab -> LDF page as illustrated below.

      

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