Locale Icon
English
  • Forums

    Popular Forums

    • LTspice
    • RF and Microwave
    • Video
    • Power Management
    • Precision ADCs
    • FPGA Reference Designs
    • Linux Software Drivers

    Product Forums

    • Amplifiers
    • Microcontrollers
    • Clock and Timing
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy Monitoring and Metering
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Power Management
    • Processors and DSP
    • Switches/Multiplexers
    • Temperature Sensors
    • Voltage References
    View All

    Application Forums

    • A2B
    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools and Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Reference Designs
    • Signal Chain Power (SCP)
    • Software Interface Tools
    • System Demonstration Platform (SDP) Support
  • Learn

    Highlighted Webinar

    Simplifying Connectivity - Remote Controlled (RC) Nodes in a Software Defined Vehicle (SDV)

    This webinar will introduce remote-controlled edge nodes and how they promise to simplify the automotive network architecture and expedite the integration...

    Places

    • ADI Education Home
    • ADI Webinars
    • GMSL U
    • StudentZone (Analog Dialogue)
    • Video Annex
    • Virtual Classroom

    Libraries

    • 3D ToF Depth Sensing Library
    • Continuous-Wave CMOS Time of Flight (TOF) Library
    • Embedded Vision Sensing Library
    • Gigabit Multimedia Serial Link (GMSL) Library
    • Optical Sensing Library
    • Precision Technology Signal Chains Library
    • Software Modules and SDKs Library
    • Supervisory Circuits Library
    • Wireless Sensor Networks Library

    Latest Webinars

    • Simplifying Connectivity - Remote Controlled (RC) Nodes in a Software Defined Vehicle (SDV)
    • Upcoming Webinar: Simplify High-Accuracy Instrumentation Design with Latest Precision Data Converters
    • Design High Performance Power Systems with Ultralow Noise Technology
    • µModule Solution for Intelligent Motion Control
    • Accelerating Embedded System Development with CodeFusion Studio™︎
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quizzes AQQ286 about Right Labels on the Right Boxes containing colored balls

      1. Quote of the week: "Knowledge is knowing a tomato is a fruit. Wisdom is not putting it in a fruit salad" - unknown Sources: commons.wikimedia...

    View All

    What's Brewing

      GMSL Quiz! Read the blog, take the quiz, and enter to win a gift card!

      Quiz! Read the GMSL Link Lock Blog - Take the Quiz and You are Entered to Win! Important: Read the blog first . The quiz questions are all based on...

    View All

    Places

    • Community Help
    • Logic Lounge
    • Super User Program

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • Blogs

    Highlighted Blogs

    IO-Link: Power Dissipation in Practice

    The Limitation of Heat Dissipation IO-Link is used across many branches of factory automation, and in these applications, areas of the factory floor...

     

    GMSL Debugging: Getting a Lock

    Imagine a scenario where you have a brand-new board design or are excited to try out some evaluation kits only to find out that the two devices can’t talk...

    Latest Blogs

    • Exploring DCM and CCM in SMPS: Part 1 of 6
    • Let’s Take a Field-Bus Trip
    • Countable vs Non-countable Faults
    • Power Your Signal: DAS Networks Unleashed: Part 2 of 4
    • Combining Functional Safety and Availability Using Redundancy
    Read All Blogs

    ADI Blogs

    • EZ Spotlight
    • The Engineering Mind
  • ContentZone

    Visit ContentZone

    ContentZone

    Technical articles. Blogs. Videos. Your ADI content, all in one place.

    View ContentZone

    Featured Content

    Featured Content Title

    Blurb About Content

    View Content By Industry

    • Aerospace and Defense Systems
    • Automotive Solutions
    • Consumer Technology Solutions
    • Data Center Solutions
    • Energy Solutions
    • Healthcare Solutions
    • Industrial Automation Technology Solutions
    • Instrumentation and Measurement Solutions
    • Intelligent Building Solutions
    • Internet of Things (IoT)
    • Wireless Communication Solutions

    View Content By Technology

    • A2B Audio Bus
    • ADI OtoSense Predictive Maintenance Solutions
    • Dynamic Speaker Management
    • Gallium Nitride (GaN) Technology
    • Gigabit Multimedia Serial Link (GMSL)
    • Industrial Vision
    • Power Solutions
    • Precision Technology
    • RF
    • Security Solutions
    • Sensor Interfaces
    • SmartMesh
  • Partners

    Partner Forums

    • Boston Engineering
    • PalmSens
    • Richardson RFPD
    • Tri-Star Design, Inc.

    Partner Libraries

    • Calian, Advanced Technologies Library
    • Clockworks Signal Processing Library
    • Colorado Engineering Inc. (DBA CAES AT&E) Library
    • Epiq Solutions Library
    • Fidus Library
    • VadaTech Library
    • Vanteon Library
    • X-Microwave Library
EngineerZone
EngineerZone
ADSP-SC5xx/ADSP-215xx
  • Log In
  • User
  • Site
  • Search
OR
Ask a Question
ADSP-SC5xx/ADSP-215xx
  • Processors and DSP
  • SHARC Processors
  • ADSP-SC5xx/ADSP-215xx
  • Cancel
ADSP-SC5xx/ADSP-215xx
Documents FAQ - Preload code customization for 215XX processors
  • Q&A
  • Files
  • Documents
  • Members
  • Tags
  • More
  • Cancel
  • +ADSP-SC57x/2157x: FAQ
  • +ADSP-SC58x: FAQ
  • +PMU registers: FAQ
  • +SC58x: FAQ
  • +SHARC+: FAQ
  • +TMU: FAQ
  • -215XX: FAQ
    • FAQ - Preload code customization for 215XX processors
  • +ADC Control Module: FAQ
  • +ADSP-21584: FAQ
  • +ADSP-215xxl: FAQ
  • +ADSP-SC573: FAQ
  • +ADSP-SC5xx/215xx: FAQ
  • +ADSP-SC5xx: FAQ
  • +CCES default startup routine: FAQ
  • +EMAC: FAQ
  • +HADC: FAQ
  • +Hardware Counter based Loops: FAQ
  • +L1 block: FAQ
  • +Preload code customization: FAQ
  • +RDEN bit: FAQ
  • +RGMII/RMII: FAQ
  • +SHARC EE-377: FAQ
  • +Sharc SC584: FAQ
  • +SMMR using MDMA2: FAQ
  • +UCOS: FAQ
  • +USBCLKSEL in CGU_CLKOUT: FAQ
  • ADSP-21569 SPORT single-transmitter multi-receiver example
  • ADSP-SC584 SSL Booting via ROM API from the ARM Cortex A5 (core0), SHARC0 and SHARC1
  • +adsp-sc584: FAQ
  • ADSP-SC594 SPDIF Example
  • Are code segments placed in block1 and block2, when data caches are enabled?
  • ASRC TDM8/TDM16 Example for ADSP-SC59x
  • Can we use internal pull down resistor for ADSP-SC59x/ADSP-2159x LP_CLK and LP_ACK pins instead of external pull down?
  • +CDU: FAQ
  • Custom Error Handler in Booting for SC594
  • Does QUAD SPI open-drain mode need external pull-up resistors for each of these signals (MISO, MOSI, D2 & D3) in ADSP-21569
  • Does the LRCLK support 50% duty cycle in TDM mode?
  • Does the TMREXP(Timer Expired) pin support in latest SHARC processor?
  • Driver file support for the ADSP-SC584/SC589 custom board, which utilizes the same flash and DDR as Ez-kit.
  • Flash write example for ADSP-SC573 Ez-Kit
  • How many cycles for a cache hit/miss?
  • How to configure DAI interrupt in ADSP-21569?
  • How to use PCG trigger event
  • How to use PC_07 instead of SYS_FAULT in ADSP-2156x/ADSP-SC59x/ADSP-2159x ?
  • +IDLE: FAQ
  • Is it possible to change the sampling/driving edges of the ASRC?
  • Is it possible to configure the DSP as Master and Host as Slave once SPI slave booting done?
  • Is it possible to disable/halt/pause the SHARC0/SHARC1 cores from ARM core?
  • Is it possible to verify Secure Booting without programming Keys into OTP Memory?
  • Is the SPIx_RDY signal necessary for SPI slave boot?
  • JEDEC thermal Resistance Data estimation for "θJA, θJC, ΨJT" in ADSP-SC5xx/ADSP-215xx processor.
  • +Local Oscillator: FAQ
  • +MLB channels: FAQ
  • +MSI IDMAC: FAQ
  • +Program the CBS parameters: FAQ
  • +SC57x: FAQ
  • SCB arbitration/priority scheme
  • +Sign and encrypt a normal bootstream: FAQ
  • SPI example for ADSP-SC584
  • +SPORT with ACM: FAQ
  • +SWU: FAQ
  • Understanding Halt feature in ACM Mode
  • Usage of flush_data_buffer api
  • Using MCAPI/MDMA for ADSP-SC594 Dual-SHARC Audio Talkthrough
  • What is "Multiplexed Function Input Tap" available in the "Signal Multiplexing" table in the datasheet.
  • What is the clock configuration (HFCLK, BCLK) required to transmit SPDIF?
  • What is the difference between ENUM_DMA_CFG_XCNT_INT and ENUM_DMA_CFG_PERIPH_INT?
  • What is the SPORT Latency using DMA between the SHARC cores(Core1 & Core2) for ADSP-SC58x?
  • What is the supported SLCK0 divisor value for ADSP-2156x

FAQ - Preload code customization for 215XX processors

Overview

 This document explains how to create/modify the preload program for the custom target on ADSP-215XX.

 The following topics are discussed:

     Pre-load Files

     Dynamic Memory Controllers (DMC) configuration

     Default Preload and Initialization Code

     Preload code for any custom board

          Modifying preload code

          Debug configuration

     Summary

 

Pre-load Files

External memory needs to be configured appropriately before applications can be loaded. When the application boots, this is done through initcodes; when the application is loaded to target using the debugger, this can be done by the IDE automatically for simple processors.

For heterogeneous processors such as the ADSP-SC58x processors, more flexibility is required.

The main purpose of these pre-load files is to set up clocks and DMC settings so that the debugger is able to load the user’s application to external memory.

 

Dynamic Memory Controllers (DMC) configuration

The dynamic memory controller (DMC) provides a glueless interface between DDR3/DDR2/LPDDR SDRAMs and the system crossbar interface (SCB). The DMC enables execution of instructions from, as well as transfer of data to and from, DDR3, DDR2 SDRAM or LPDDR SDRAM respectively.

The DMC supports access to the external memory by core and DMA accesses.

Parts with 2 DMCs are: ADSP-SC587,ADSP-SC589,ADSP-21587

Parts with 1 DMCs are: ADSP-SC584,ADSP-SC583,ADSP-SC582,ADSP-21584,ADSP-21583,ADSP-SC573,ADSP-SC572,ADSP-21573

Parts with 0 DMCs are: ADSP-SC571,ADSP-SC570,ADSP-21571

 

Default Preload and Initialization Code

The CCES installation provides the source code and project files of preload and initialization code for ADSP-215XX processors in the directory:

[CCES_Install]/ CrossCore Embedded Studio 2.6.0/SHARC/ldr/init_code/215xx_Init

 

Preload code for any custom board

The CGU and DMC settings in the default preload and initialization source code may need to be modified for the following conditions:

  1. When using the EZ-Board (or a custom board with the same DDR memory device as that populated on the EZ-Board) with non-default CGU settings.
  2. When using a custom board with a different memory device.

Modifying preload code:

  1. Open the preload code for the necessary part from the latest CCES installation.

[CCES_Install]/ CrossCore Embedded Studio 2.6.0/SHARC/ldr/init_code/215xx_Init

  1. Change the project setting from "C/C++ Build > Settings > Processor Settings” to match the processor on the custom board.
  2. If your custom hardware uses different CLKINx than that used in the EZ-KITS (25MHz) you must modify this value in the sc5xx_init.h file.
  3. If your custom hardware uses the same DDR as one of these EZ-KITS you can define the CONFIG macros as mentioned below in config.h file available in "src" subdirectory.

For 2 DMCs:

#define CONFIG_DMC0 Micron_2Gb_DDR3_MT41K128M16JT

#define CONFIG_DMC1 Micron_2Gb_DDR3_MT41K128M16JT

#define CONFIG_CORE_CLOCK_SPEED 450000000u

 

For 1 DMC:

#define CONFIG_DMC0 Micron_2Gb_DDR2_MT47H128M16

#define CONFIG_DMC1 DMC_NONE

#define CONFIG_CORE_CLOCK_SPEED 450000000u

  1. By default DMC register values are for the Memory on EZ-KIT. For different memory, use "DMC_Registers_List.xlsx" sheet to provide input memory parameters and generate DDR register values. Update the sc58x_init.c with the new values.
  2. Now build the code and customized preload .dxe is generated.

Note: Unlike preload code, initialization code is actually a part of the application. Pre-load files should be used only during emulation. Do not use pre-load files when building bootable LDR files. To run from flash, the corresponding initcode file (created from the same source files as the pre-load file) ought to be selected in the initialization section while creating the loader file.

 

Debug Configuration:

Preloads are only added automatically to Debug Configurations when there is an EZ-Kit available for the selected processor (ADSP-SC584, ADSP-SC589, ADSP-SC573). If no EZ-Kit is available, no preload is specified by default as the configuration performed by the preload will need to be tailored to your custom hardware, for which the default one may not be appropriate.

Follow the below steps:

  1. Select the project and choose: Debug As > Debug Configurations from the context menu

        The Run/Debug Configurations dialog box appears.

  1. Click on ‘Application with CrossCore Debugger’, then on the ‘New’ button, and proceed with the wizard.
  2. The Session tab is selected by default as shown below.
  3. Click Add, by selecting "Device 0 [Core 1]".

    The "Select a program to load" dialog box appears.

  1. Choose the project, make sure “Reset core before load” is checked and "Check silicon revision before load" is NOT unchecked. Click OK.

       

  1. Preload program is being loaded prior to Core1 application, so click "Move up" by selecting preload code.
  2. Select Core 1 application and click Edit. Make sure “Reset core before load” is NOT checked. If this is checked, it will undo the preload settings.
  3. Click Apply and Debug.
  4. Modification of SHARC ldf is also required, if DMCs changed

For example: ADSP-21587 have 2 DMCs and your custom board only uses DMC0, set DMC1 memory size to 0,under system.svc -> Startup Code/LDF tab -> LDF page as illustrated below.

      

  • Share
  • History
  • More
  • Cancel
analog-devices logo

About Analog Devices

  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue

Get the Latest News

Stay up to date with our latest news and articles about Analog Devices' products, design tools, trainings, and events.

Sign Up Now
  • Instagram page
  • Twitter page
  • Linkedin page
  • Youtube page
  • Facebook
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings
沪ICP备09046653号-1

©2025 Analog Devices, Inc. All Rights Reserved

analog-devices

About Analog Devices

Down Up
  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

Down Up
  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue

Get the Latest News

Stay up to date with our latest news and articles about Analog Devices' products, design tools, trainings, and events.

Instagram page Facebook Twitter page Linkedin page Youtube page
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings
沪ICP备09046653号-1

©2025 Analog Devices, Inc. All Rights Reserved