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ADSP-SC5xx/ADSP-215xx
Documents Using MCAPI/MDMA for ADSP-SC594 Dual-SHARC Audio Talkthrough
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  • +ADSP-SC57x/2157x: FAQ
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  • Using MCAPI/MDMA for ADSP-SC594 Dual-SHARC Audio Talkthrough
  • What is "Multiplexed Function Input Tap" available in the "Signal Multiplexing" table in the datasheet.
  • What is the clock configuration (HFCLK, BCLK) required to transmit SPDIF?
  • What is the difference between ENUM_DMA_CFG_XCNT_INT and ENUM_DMA_CFG_PERIPH_INT?
  • What is the SPORT Latency using DMA between the SHARC cores(Core1 & Core2) for ADSP-SC58x?
  • What is the supported SLCK0 divisor value for ADSP-2156x

Using MCAPI/MDMA for ADSP-SC594 Dual-SHARC Audio Talkthrough

Introduction:

The ADSP-SC594 processor contains two SHARC+ cores (with 640KB of L1 SRAM each), an ARM Cortex-A5 processor, and 256KB of L2 SRAM. A system crossbar and DMA controller provide simultaneous access to multiple memory spaces. This EE-note covers two methods for moving data between cores, commonly called Inter-Core Communications (ICC), and is centered about a dual-SHARC audio talkthrough example. The example takes audio from an ADC into one

SHARC+ core, passes it to the second SHARC+ core (using an ICC), and finally sends it out to a DAC.

Dual-SHARC Audio Talkthrough Overview

The ADSP-SC59x dual-SHARC audio talkthrough example takes in two channels of analog audio and digitizes it. The digitized audio is passed serially through two SHARC cores, and the result is converted back to the analog domain and output as two channels of analog audio.

The dual-SHARC audio talkthrough is an example of how to use ICC between the SHARC cores. The ADSP-SC58x processor supports two forms of ICC, Multi-Core Communications API (MCAPI) and Memory DMA (MDMA). This example demonstrates both ICC methods, as MCAPI is used during initialization to configure MDMA, and MDMA is used during runtime to maximize performance.

In this example, the ARM core is only used to enable SHARC cores. Out of reset, the ARM core executes first while the SHARC+ cores are held in reset. After the ARM releases the SHARC+ cores from reset. MCAPI is then used to synchronize the two SHARC+ cores after they come out of reset.

Inter-Core Communications (ICC):

ICC is used to transfer data between cores. the ADSP-SC594 processor contains two SHARC+ cores, each with 640KB of L1 SRAM and a shared 256KB L2 SRAM. Each SHARC+ L1 SRAM is mapped twice in the system’s linear address space - one region is private to that SHARC+ core, and the other is accessible from any core (multiprocessor space). Transfers to or from the SHARC+ L1 SRAM use the multiprocessor address space. The ARM core can also copy data to either SHARC+ L1 SRAM using the multiprocessor space.

The ADSP-SC594 tools supports two ICC libraries for transferring data between cores, MCAPI and MDMA. MCAPI is an industry standard, and the ADSP-SC594 port of MCAPI uses core operations for transferring data, which consumes CPU cycles. MDMA is a hardware block in the ADSP-SC594 architecture that can transfer data between cores in the background without CPU intervention.

Multicore Communications API (MCAPI):

The Multicore Communications Applications Interface (MCAPI) protocol is a message-passing API that provides for communication and synchronization between processing cores in embedded systems. In the ADSP-SC594 processor, MCAPI can be used to transfer data between all three cores (e.g., S1L1 to S2L1, L2 SRAM to S1L1 or S2L1, S1L1 or S2L1 to L2 SRAM, etc.).

MCAPI uses domains, nodes, and endpoints for communications. A domain is a collection of nodes. Each core is a node, and all three nodes comprise a single domain (the ADSP-SC594 processor itself). Each node can have multiple endpoints, which can be thought of as the ends of a pipe. Two endpoints are required to pass data through the pipe.

The MCAPI API is easy to use, supporting both polling and blocking function calls. MCAPI does not support callbacks. Once an endpoint is generated on both sides of the pipe, data can be transferred in both directions.

Using MCAPI to Synchronize MDMA Initialization:

To send a message using MCAPI, two endpoints must be created – one by the source core and one by the destination core. After the source core creates its endpoint using mcapi_endpoint_create(), it waits for the destination core to create its endpoint by calling the mcapi_endpoint_get() function. After both endpoints are created, communication can occur between cores. with an endpoint created on both sides (master and slave), a communication pipe is created. Using this pipe Slave send audio buffer address to the source core. The source core will use this address when initiating the MDMA transfer.

Memory DMA (MDMA):

After the MDMA channel is configured, sending a data buffer from S1L1 is done using a simple MDMA library call. After the transfer is complete, a MDMA completion interrupt occurs on the SHARC #2 core, effectively combining the transfer and buffer ready signaling into a single hardware module. The result is the least amount of CPU cycles possible used to move the data between cores.

Loading and Running the Example:

The dual-SHARC talkthrough example has code in all three cores. At reset, the ARM core initializes the board and releases the SHARC cores are from reset, and both SHARC cores start executing at approximately the same time. The main() function for the source core (SHARC #1) is in MultiCoreTalkThruSC594_Core1.c. The main() function for the destination core (SHARC #2) is in MultiCoreTalkThruSC594_Core2.c.

ADAU_init.c module holds ADC and DAC driver containing all the functions required to interface to the ADAU1979 codec and ADAU1962 codec, which executes on the SHARC #1 source core.

Instantiating the MDMA interface is done on the source side using the SHARC_linkMasterInterface.c module and on the destination side using the SHARC_linkSlaveinterface.c module. These modules perform the data exchange and synchronization used to initialize the MDMA transfer.

Conclusion:

The ADSP-SC594 processor is a multicore SoC with an ARM Cortex-A5 core and two SHARC+ cores. While MCAPI is very easy to use with a rich API, it uses core accesses to move data from one SRAM to the next, requiring CPU cycles that could otherwise be used by application code. MDMA requires a separate synchronization mechanism during configuration (making it more difficult to setup) and some compile-time decisions about how to share Sid and destination buffer address during initialization. The advantage, however, is that MDMA does not require CPU cycles to transfer data (data transfer is done by hardware in the background) and a hardware-generated interrupt occurs on the destination core to indicate the buffer is ready for processing. MDMA uses significantly less CPU cycles to transfer data from a source to destination.

References:
[1] Using MCAPI/MDMA for ADSP-SC58x Dual-SHARC Audio Talkthrough (EE-377). Analog Devices, Inc.
[2] ADSP-SC594 Processor Datasheet. Analog Devices, Inc.
[3] ADSP-SC594 Processor Hardware Reference. Analog Devices, Inc.

5415.Dual-SHARC talkthrough example.zip

Tags: Audio Signal Processors ADSP-SC594 adau1979 Audio Products Audio D/A Converters Integrated/Special Purpose A/D Converters SHARC Audio Processors/SoCs Audio A/D Converters adau1962 Show More
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