How to configure MSI IDMAC for Dual Buffer Descriptor Ring mode operation

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In Dual Buffer descriptor mode, each descriptor can transfer the data from two different buffers with buffer size up to 4096 bytes. In this mode IDMAC can either use only one descriptor to transfer the data from two buffer or it can have multiple descriptors which can be chained to run one after the other. Unlike the chained descriptor mode where the descriptor has the address of next descriptor, dual buffer mode links the descriptors using a fixed offset between the end address of current descriptor and start address of next descriptor. This fixed offset is same for all the descriptors in the chain and is programmed in DSL(Descriptor Skip Length) field of MSI_BUSMOD register. 
 Forming a ring chain of descriptors in dual buffer mode is also possible. This is helpful if the same set of descriptors need to be used again and again in a ring form. In order to configure the IDMAC descriptors in Dual buffer ring mode, use following steps: 
 
 Set up the 'N' IDMAC descriptors in the Host memory with different descriptor elements like Buffers sizes, Buffer addresses programmed appropriately. 
 For the first descriptor, FS(First Descriptor) bit in the first descriptor element should be set to inform the IDMAC that this is the first descriptor. In addition OWN bit should also be set. 
 For Descriptor 2 to Descriptor N-1, OWN bit in the first descriptor element should also be set. 
 For descriptor N(last descriptor in the ring), EOR bit should be set. This informs the IDMAC to load the first descriptor address after finishing the Nth descriptor thus forming a ring. 
 Enable the IDMAC interrupt. Normally IDMAC interrupt occurs when each descriptor finishes. However the individual descriptor interrupt generation can be disabled by setting the DIC(Disable Interrupt on Completion) bit in the descriptor 
 When the last descriptor interrupt occurs, update all the descriptors in the chain. Do following:
 
 Update the Buffer addresses for each descriptor 
 Set the OWN bit for each descriptor(as the IDMAC clears this bit once it executes the descriptor) 
 Write to PLDMND register with any non-zero value to cause the re-fetch of the descriptor.

Do this as long as the software needs the descriptor ring to continue. 
 Before the last iteration of the Ring, do the following additional steps(in addition to above mentioned steps) in the last descriptor interrupt :
 
 Clear the EOR bit of last descriptor 
 Set the LD (Last Descriptor ) bit of the last descriptor.

With EOR cleared and LD set in the last descriptor, the descriptor chain breaks and the IDMAC closes the descriptor operation.

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