Code Example : MEC programming sequence

This code demonstrates the usage of MEPU in routing the L1 SRAM parity error generated in SHARC+ Core2 to SHARC+ Core1 in ADSP-SC57x.

  •  Analog Employees 
Anonymous
  • Hi , 

    Is this an add-in controller on SC57x which is not present on SC58x .

    Could you please let me know if there are any sample for illegal opcode and parity error on SC58x 

    Thanking you 

    With best regards and wishes