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UART and Receiver Time-out

Thread Summary

The user seeks to implement a Receiver Time-out feature for variable-length frames in UART on a microcontroller or DSP. The final solution involves using Width Capture Mode Overflow to configure a timer that triggers an interrupt and stops RX DMA if the timer overflows, indicating an idle condition. The ADSP-SC58x processors' UART and GP timers can be used to detect break commands and measure pulse widths, providing a way to handle the time-out period.
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UART of microcontrollers and DSPs of other manufactures have Receiver Time-out feature which allow to define an end of variable-length frame.

I want this feature.

My decision is to use Width Capture Mode Overflow.

I configure the timer to measure 4 char time and if a timer count is overflowed the interrupt arise and receive are stopped.

Am I right?

Parents
  • Hi Eugene,

                Thanks for sharing the details. I understand the requirements now. Please note that the UART on the ADSP-SC58x processors support the break command mode feature needed by the LIN protocol.  You can refer to page 1503 and 4 of the HRM on the below link:

    http://www.analog.com/media/en/dsp-documentation/processor-manuals/SC58x-2158x-hrm.pdf

    I have copied the contents for your reference here:

    The UART receiver can detect break commands through the break indicator (UART_STAT.BI) flag. This flag reports that an entire UART frame has been received in low state. It does not report whether the duration of the received low pulse was exact or at least 13
    bit-times as LIN masters transmit. Typically, the break indicator meets LIN requirements. The processor can use GP timers to determine the pulse width more precisely, if necessary.

    Each UART_RX pin is also routed to a GP timer through its alternate capture input (TACI). This functionality is not only useful for bit rate detection (autobaud) but also helps to measure the pulse widths precisely on the UART_RX input. Additionally, the GP timers can issue an interrupt or a fault condition when the received pulse width is shorter than a bit time or longer than the worst-case break condition. The windowed watchdog width mode of the GP timers controls this functionality.

     

    You can use the timer in parallel with this Break indicator status to understand the timeout period.

     

    Hope this helps.

     

    Best Regards,

    Jeyanthi

Reply
  • Hi Eugene,

                Thanks for sharing the details. I understand the requirements now. Please note that the UART on the ADSP-SC58x processors support the break command mode feature needed by the LIN protocol.  You can refer to page 1503 and 4 of the HRM on the below link:

    http://www.analog.com/media/en/dsp-documentation/processor-manuals/SC58x-2158x-hrm.pdf

    I have copied the contents for your reference here:

    The UART receiver can detect break commands through the break indicator (UART_STAT.BI) flag. This flag reports that an entire UART frame has been received in low state. It does not report whether the duration of the received low pulse was exact or at least 13
    bit-times as LIN masters transmit. Typically, the break indicator meets LIN requirements. The processor can use GP timers to determine the pulse width more precisely, if necessary.

    Each UART_RX pin is also routed to a GP timer through its alternate capture input (TACI). This functionality is not only useful for bit rate detection (autobaud) but also helps to measure the pulse widths precisely on the UART_RX input. Additionally, the GP timers can issue an interrupt or a fault condition when the received pulse width is shorter than a bit time or longer than the worst-case break condition. The windowed watchdog width mode of the GP timers controls this functionality.

     

    You can use the timer in parallel with this Break indicator status to understand the timeout period.

     

    Hope this helps.

     

    Best Regards,

    Jeyanthi

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