UART and Receiver Time-out

Hi Eugene,

             I am not very clear about the Receiver Time out feature you are mentioning here. Can you provide additional details on this? Are you looking for a means to stop the UART receiver after certain amount of time even though the transmitter is sending data continuously?

Best Regards,

Jeyanthi

The paragraph 30 "Universal Synchronous Asynchronous Receiver Transceiver (USART)" from Atmel_32-bit-ARM7TDMI-Flash-Microcontroller_SAM7X512-256-128_Datasheet.pdf:

30.6.3.8 Receiver Time-out

The Receiver Time-out provides support in handling variable-length frames. This feature detects an idle condition on the

RXD line. When a time-out is detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises and can

generate an interrupt, thus indicating to the driver an end of frame.

The time-out delay period (during which the receiver waits for a new character) is programmed in the TO field of the

Receiver Time-out Register (US_RTOR). If the TO field is programmed at 0, the Receiver Time-out is disabled and no

time-out is detected. The TIMEOUT bit in US_CSR remains at 0. Otherwise, the receiver loads a 16-bit counter with the

value programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is

received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises. Then, the user can either:

 Stop the counter clock until a new character is received. This is performed by writing the Control Register (US_CR)

with the STTTO (Start Time-out) bit at 1. In this case, the idle state on RXD before a new character is received will

not provide a time-out. This prevents having to handle an interrupt before a character is received and allows

waiting for the next idle state on RXD after a frame is received.

 Obtain an interrupt while no character is received. This is performed by writing US_CR with the RETTO (Reload

and Start Time-out) bit at 1. If RETTO is performed, the counter starts counting down immediately from the value

TO. This enables generation of a periodic interrupt so that a user time-out can be handled, for example when no

key is pressed on a keyboard.

If STTTO is performed, the counter clock is stopped until a first character is received. The idle state on RXD before the

start of the frame does not provide a time-out. This prevents having to obtain a periodic interrupt and enables a wait of

the end of frame when the idle state on RXD is detected.

If RETTO is performed, the counter starts counting down immediately from the value TO. This enables generation of a

periodic interrupt so that a user time-out can be handled, for example when no key is pressed on a keyboard.

Figure 30-14 shows the block diagram of the Receiver Time-out feature.

So Receiver Time-out allow to detect an idle condition on the RXD line.

For example the invalid device can flush into RXD line only one char, but the correct devices can flush into RXD line correct message and my device must react right.

My decision is to use Width Capture Mode Overflow.

I configure the timer that it is overflowed the error timer interrupt arise and the handler of the error timer interrupt stop RX DMA of UART and call RX UART handler that start new RX DMA of UART if it's necessary.

Hi Eugene,

            Thanks for sharing the details. I understand the requirements now. Please note that the UART on the ADSP-SC58x processors support the break command mode feature needed by the LIN protocol.  You can refer to page 1503 and 4 of the HRM on the below link:

http://www.analog.com/media/en/dsp-documentation/processor-manuals/SC58x-2158x-hrm.pdf

I have copied the contents for your reference here:

The UART receiver can detect break commands through the break indicator (UART_STAT.BI) flag. This flag reports that an entire UART frame has been received in low state. It does not report whether the duration of the received low pulse was exact or at least 13
bit-times as LIN masters transmit. Typically, the break indicator meets LIN requirements. The processor can use GP timers to determine the pulse width more precisely, if necessary.

Each UART_RX pin is also routed to a GP timer through its alternate capture input (TACI). This functionality is not only useful for bit rate detection (autobaud) but also helps to measure the pulse widths precisely on the UART_RX input. Additionally, the GP timers can issue an interrupt or a fault condition when the received pulse width is shorter than a bit time or longer than the worst-case break condition. The windowed watchdog width mode of the GP timers controls this functionality.

You can use the timer in parallel with this Break indicator status to understand the timeout period.

Hope this helps.

Best Regards,

Jeyanthi

Thank you very much!

I can try my decision.