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How to transfer clock and data from DAI0 to DAI1?

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Category: Software
Product Number: ADSP-21569

Hi ,
As shown in the figure below, the TDM port on the SOC side has 6 PINs connected to DAI0. DAI0 receives clock and data, which are then transmitted to DAI1 through ADSP. DAI1 is connected to the 6 PINs of the A2B chip;


We expect to be able to transfer the clock and data from TDM to A2B, but from the actual SRU operation, it is not possible to transfer DAI0 to DAI1 because DAI0 can only provide to SPORT0~3, and DAI1 can only provide to SPORT4~7,
1. How to transfer clock and data from DAI0 to DAI1?
2. I tried using the following plan, but I have three questions
a. Is this data transmission mode reasonable??
b. Isn't the clock synchronization between DAI0 and DAI1 in this way??
c. Transferring sport0 to sport4: Transferring through adi_Sport_SMATransfer???

/*TDM to A2B*/

        SRU(DAI0_PB01_O, SPT0_ACLK_I); /*DAI0 clock to SPORT 0A*/

        SRU(DAI0_PB02_O, SPT0_AFS_I);  /*DAI0 FS to SPORT 0A*/

        SRU(DAI0_PB05_O, SPT0_AD0_I);  /*DAI0 Data to SPORT 0A*/

        //SRU(DAI0_PB06_O, SPT0_AD0_I);  /*DAI0 Data to SPORT 0A*/

 

        SRU2(SPT4_ACLK_O, DAI1_PB01_I); /*SPORT 4A clock to DAI1*/

        SRU2(SPT4_AFS_O, DAI1_PB02_I);  /*SPORT 4A FS to DAI1*/

        SRU2(SPT4_AD0_O, DAI1_PB05_I);  /*DAI0 Data to SPORT 0A*/

        SRU(LOW, DAI0_PBEN01_I);

        SRU(LOW, DAI0_PBEN02_I);

        SRU(LOW, DAI0_PBEN05_I);

        SRU2(HIGH, DAI1_PBEN01_I);

        SRU2(HIGH, DAI1_PBEN02_I);

        SRU2(HIGH, DAI1_PBEN05_I);


3. Refer to the CRS method in the manual to implement DAI0 to DAI1. There are some questions about these interfaces:
a. Only pins PB03~PB06 correspond to each other?
b. Our hardware PIN angle has been designed according to the schematic above. Can we continue to use this solution?

Shared Clock:

DAI0_CRS_PB03_O    è   DAI1_CRS_PB03_O

DAI0_CRS_PB05_O    è   DAI1_CRS_PB05_O


Frame Sync:

DAI0_CRS_PB04_O    è   DAI1_CRS_PB04_O

DAI0_CRS_PB06_O    è   DAI1_CRS_PB06_O

 

Shared Pin Buffer:

DAI0_CRS_PIN03  à  DAI1_CRS_PIN03

DAI0_CRS_PIN05  à  DAI1_CRS_PIN05

 

DAI0_CRS_PIN04  à  DAI1_CRS_PIN04

DAI0_CRS_PIN06  à  DAI1_CRS_PIN06



Thanks

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[edited by: Boschliu at 2:33 AM (GMT -4) on 18 Jun 2025]
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  • Hi Yunhe,

    Regarding " Is this data transmission mode reasonable?
    >> Yes, using SPORT0 to receive data from DAI0 and SPORT4 to transmit data to DAI1 is a reasonable data transmission mode. Please ensure that both SPORT0 and SPORT4 are clocked from the same bit clock (BCLK) and frame sync (FS). SPORT4 should output the same clock and FS signals to DAI1.

    Regarding "Transferring sport0 to sport4: Transferring through adi_Sport_SMATransfer???"
    >> Yes, you can use the adi_sport_DMATransfer() API to transfer data.

    Regarding "Only pins PB03~PB06 correspond to each other?"
    >> The CRS method only supports specific pins (PB03–PB06). However, you can connect as follows if you are not already using DAI pins 3 and 4:
    SRU(DAI0_PB01_O, DAI0_PB03_I);
    SRU2(DAI1_CRS_PB03_O,SPT4_ACLK_I );

    Similarly, for frame sync:
    SRU(DAI0_PB02_O, DAI0_PB04_I);
    SRU2(DAI1_CRS_PB04_O, SPT4_AFS_I );

    This allows peripherals on both DAI0 (e.g., SPORT 0A) and DAI1 (e.g., SPORT 4A) to share the same Clock and Frame Sync signal, maintaining synchronization.

    Regards,
    Nandini C

  • Hi 

    Thank you for your reply.
    The CRS method only supports specific pins (PB03–PB06). However, you can connect as follows if you are not already using DAI pins 3 and 4:

    SRU(DAI0_PB01_O, DAI0_PB03_I);

    ==>I understand what you mean, but our current hardware connection already uses PB03, PB04, PB05, and PB06 as data interfaces. How should we operate them? Is there any other plan to implement it?

Reply
  • Hi 

    Thank you for your reply.
    The CRS method only supports specific pins (PB03–PB06). However, you can connect as follows if you are not already using DAI pins 3 and 4:

    SRU(DAI0_PB01_O, DAI0_PB03_I);

    ==>I understand what you mean, but our current hardware connection already uses PB03, PB04, PB05, and PB06 as data interfaces. How should we operate them? Is there any other plan to implement it?

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