Hi team,
in adsp sharc 21583 , with cross core embedded studio 2.11.0.
i have 1ms ISR where the buffer tx_msg_buffer is filled and the Message_length is total number of bytes filled in the tx_msg_buffer.
the Baud rate is 460800.
Message length will be 36 bytes.
Issue:
- the uart is to be used in DMA mode. but after few bytes of data transmission the data stops coming on UART. the code is running (verified by stopping the execution and checking the buffer). the buffer will contain data but, the data won't come on terminal
- the core clock is 450 MHz, and SCLK_0 is 112.5MHz, At 921600 baud rate the data gets corrupted. HRM mentions that it supports the baud rate, but the data does not come correct. the bytes will be wrong. So, I had to use 460800 baud.
please suggest what is going wrong.
void WriteUartDsp (volatile unsigned char* tx_msg_buffer) { /* Loop in while until the previous transmission is completed */ while (M_TRUE) { test = 0; test = *pREG_DMA20_STAT; /* Check the DMA status, if DMA status is Idle/Stop break the while loop*/ if (M_ZERO == (test & M_DMA_RUN_STOP)) { break; } } *pREG_SPU0_SECUREP82 =0x3; //uart rx dma 20 *pREG_SPU0_SECUREP83 =0x3; //uart tx dma 21 /* Set the UART0 Interrupt mask to zero*/ *pREG_UART0_IMSK_SET = M_ZERO; /* Wait till the UART0 transmit hold and shift register are empty */ while (M_ZERO == (*pREG_UART0_STAT & BITM_UART_STAT_TEMT)) ; while (M_ZERO == (*pREG_UART0_STAT & ENUM_UART_STAT_THR_EMPTY)) ; /* Disable the DMA 20 */ *pREG_DMA20_CFG = ENUM_DMA_CFG_DIS; /* Assign the DMA start address for transmission */ *pREG_DMA20_ADDRSTART = (void *) (M_MP_OFFSET | (T_U32) tx_msg_buffer); /* * Configure DMA0 Registers, set STOP mode flow control, memory and * physical transfer as 1 byte */ *pREG_DMA20_CFG = ( ENUM_DMA_CFG_MSIZE01 | ENUM_DMA_CFG_MSIZE01 | ENUM_DMA_CFG_STOP); /* Number of bytes to be transmitted */ *pREG_DMA20_XCNT = Message_length /* Address increments in bytes */ *pREG_DMA20_XMOD = M_ONE; /*~ GPSB-SDD-FNC-7576 ~*/ /* Enable the DMA 20 */ *pREG_DMA20_CFG |= ENUM_DMA_CFG_EN; /* * Set the UART0 Interrupt mask to enable Receiver full interrupt and * transmit full interrupt */ *pREG_UART0_IMSK_SET = M_THREE; }