Category: Hardware
Product Number: ADSP-SC589
Our design under consideration needs an external FPGA connected to ADSP-SC58x via SMC.
And we want all cores have access to FPGA though SMC, as memory mapped device.
Processor Hardware Manual says " The processor SCB interconnect fabric arbitrates accesses to the SMC".
This sounds like the access to SMC can be done by any cores at any given point of time, and single read/write operation to SMC is atomic operation arbitrated by hardware.
No other exclusive access to share one instance of SMC among all cores in SC58x, correct?
Please confirm this.
p.s., We plan to use Linux on ARM core, and access to SMC memory region (mapped to FPGA) will be via use of mmap().
