Dear Team,
I have already posted a query in another link but did not receive any reply. In the meantime I have made some progress so I am updating my question below:
In the SPDIF Loopback example why is the Clock source selected as AD_PCG_CLKIN0 .
In my case considering AVR9 when I select the Source as external DAC output is fine but no Output from SPDIF Tx
Please correct my SRU routing if its not appropriate
SRU(LOW,DAI0_PBEN05_I); // External MCLK from 24.576MHz Oscillator
SRU(LOW,DAI1_PBEN07_I); //DAI 1 Pin 07 is connected with MCLK In pin of AD1939 Codec
SRU(DAI1_PB07_O,PCG0_EXTCLKA_I); // MCLK to PCG C
SRU(PCG0_CLKA_O,DAI1_PB03_I);
SRU(PCG0_FSA_O,DAI1_PB04_I);
SRU(DAI1_PB04_O,SPDIF1_TX_FS_I);
SRU(DAI1_PB03_O,SPDIF1_TX_CLK_I);
SRU(PCG0_CLKB_O,SPDIF1_TX_HFCLK_I);
SRU(SPT4_AD0_O,SPDIF1_TX_DAT_I);
/********************Direct SPDIF In to Out Routing just for confirmation ************************/
SRU(SPDIF1_TX_O,DAI1_PB20_I);
SRU(HIGH,DAI1_PBEN20_I);
Regards,
Hermione
Edit
[edited by: Hermione at 2:04 PM (GMT -5) on 18 Jan 2024]
