Hi ,
In our project we are using two different DSP's ( Master- SC594 & slave-21593). I have configured the SPORT (SPORT_7 in master & SPORT_0 in slave) to transmit and receive 64 channels(32 for primary & 32 for secondary) 16 bit data in both primary and secondary SPORT channel between master and slave DSP and I try to loop-back audio data between two DSP, which means I am transmitting the input data from SPORT_7b buffer to SPORT_0a buffer and I copy the input samples to SPORT_0b buffer and again I transmitting the data to SPORT_7a buffer.
The issue which I am facing in this is ,
1. I am getting the data mismatch in slave DSP(SPORT_0a buffer) which is received from the master DSP (SPORT_7b buffer) and again its loop-back to master DSP I am getting the same data in SPORT_7a buffer which I transmitted from SPORT_7b buffer.
As per the hrm , the both SPORT data paths are enabled, the DMA channel alternately loads to the primary and secondary transmit data buffers once it is enabled. As such, the interleaving requirement is for the primary left-channel data to be followed by the secondary left-channel data, then the primary right-channel data, and finally the secondary right-channel data.
2. But at the receiving end (in SPORT_0a & SPORT_7a buffer) the data is not interleaved.
3. The behavior of data mismatch occurs in slave DSP is not in same pattern.
