I am trying to configure Timer0 as a periodic interrupt received on the ARM core. When using the ADI Timer API, things work as expected and I receive calls to my ISR as expected. However, due to code size issues, I want to enable this same functionality without using the ADI Timer API. Despite my best attempts, I cannot ever receive the interrupt in the ARM core, and never see my ISR get called.
The following code illustrates what works properly using the Timer API vs. what I'm trying to do using just register access to configure the timer. I can see the timer is running just fine using register access to configure, but the interrupt never makes it to the ARM core for processing.
#if USING_TIMER_API //This way works eTmrResult = adi_tmr_Open (FAST_TMR, // Timer Number FastTimerMemory, // Pointer to Timer Management Memory Location ADI_TMR_MEMORY, // Size of allocated Management Memory Location FastTimerISR, // Pointer to Timer ISR NULL, // Optional pointer to callback parameter to be passed to ISR. &hFastTimer // Pointer to storage for Handle to the opened timer. ); *pREG_TIMER0_TMR0_CFG = 0x43C; // Continuous PWM, SCLK0, Period Expire, Output Disable. *pREG_TIMER0_TMR0_PER = FAST_TMR_PER; // Set the period. *pREG_TIMER0_RUN_SET |= BITM_TIMER_RUN_SET_TMR00; // Enable Timer0 using BIT0. #else / /Interrupt never happens using this code gicResult = adi_gic_Enable(true); gicResult = adi_int_InstallHandler(INTR_TIMER0_TMR0 /*26*/,&FastTimerISR,0,false); gicResult = adi_gic_ConfigInt(INTR_TIMER0_TMR0,ADI_GIC_INT_LEVEL_SENSITIVE,ADI_GIC_INT_HANDLING_MODEL_1_N); gicResult = adi_gic_SetTargetCore(INTR_TIMER0_TMR0/*26*/,ADI_GIC_CORE_0); gicResult = adi_gic_EnableInt(INTR_TIMER0_TMR0,true); adi_int_EnableInt(INTR_TIMER0_TMR0,true); *pREG_SEC0_GCTL |= ENUM_SEC_GCTL_EN; // Enable SEC *pREG_SEC0_SCTL26 |= 0x03; // Configure TImer0 Interrupt *pREG_TIMER0_DATA_IMSK &= ~BITM_TIMER_DATA_IMSK_TMR00; *pREG_TIMER0_STAT_IMSK &= ~BITM_TIMER_STAT_IMSK_TMR00; *pREG_TIMER0_TMR0_CFG = 0x043C; // Continuous PWM, SCLK0, Period Expire, Output Disable. *pREG_TIMER0_TMR0_PER = FAST_TMR_PER; // Set Period. *pREG_TIMER0_TRG_MSK &= ~BITM_TIMER_TRG_MSK_TMR00; *pREG_TIMER0_TRG_IE &= ~BITM_TIMER_TRG_IE_TMR00; *pREG_TIMER0_DATA_ILAT |= BITM_TIMER_DATA_ILAT_TMR00; // Clear any previous latched interrupt. *pREG_TIMER0_RUN_SET |= BITM_TIMER_RUN_SET_TMR00; // Enable Timer0 via BIT0. #endif
Please help me understand what I need to do differently to get the Timer0 interrupt processed by the ARM core of my SC587.