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Unexpected behavior with SDRAM access affects Loop counters

nulvinge
on Sep 25, 2020

I am writing a program which requires a few buffers in SDRAM (I need about 5MB), but the code yields unexpected behaviour.

I have attached a minimal example code which reproduces the problem.

It seems that loop counters are affected by SDRAM accesses.

We are using SC589 EZKIT, and I just run it with the debugger with CrossCore 2.8.3 on Windows.

I suspect there is something I am missing, but I fail to find something in the documentation.

Otherwise this seems to be a compiler code generation bug, or a hardware bug.

Below is the output for different variations of runs.

SIMD on, commented if statement:
Start
81000080

Program hangs
Pause -> PC=0x0


SIMD on, uncommented if statement:
Start
81000080
ERR: 81000080:01	0.000000000e+00	!= 1.000000000e+00	p:81000100	&p:002c0900
ERR: 81000080:03	0.000000000e+00	!= 3.000000000e+00	p:81000100	&p:002c0900
ERR: 81000080:05	0.000000000e+00	!= 5.000000000e+00	p:81000100	&p:002c0900
ERR: 81000080:07	0.000000000e+00	!= 7.000000000e+00	p:81000100	&p:002c0900
ERR: 81000080:09	0.000000000e+00	!= 9.000000000e+00	p:81000100	&p:002c0900
ERR: 81000080:11	0.000000000e+00	!= 1.100000000e+01	p:81000100	&p:002c0900
ERR: 81000080:13	0.000000000e+00	!= 1.300000000e+01	p:81000100	&p:002c0900

A non-recoverable error or exception has occurred.
  Description:   An illegal instruction has been detected.
  General Type:  RunTimeError
  Specific Type: IllOpCodeDetected
  Error PC:      0x00180130
  

  
  
SIMD off, commented if statement
Start
81000080
ERR: 81000078:00	3.000000000e+01	!= 0.000000000e+00	p:810000f8	&p:002c0900
ERR: 81000078:01	3.100000000e+01	!= 1.000000000e+00	p:810000f8	&p:002c0900
810000f8
81000178
ERR: 81000170:00	3.000000000e+01	!= 0.000000000e+00	p:810001f0	&p:002c0900
ERR: 81000170:01	3.100000000e+01	!= 1.000000000e+00	p:810001f0	&p:002c0900
810001f0
81000270
...



SIMD on, uncommented if statement
Start
81000080
ERR: 81000004:00	1.000000000e+00	!= 0.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:01	2.000000000e+00	!= 1.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:02	3.000000000e+00	!= 2.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:03	4.000000000e+00	!= 3.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:04	5.000000000e+00	!= 4.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:05	6.000000000e+00	!= 5.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:06	7.000000000e+00	!= 6.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:07	8.000000000e+00	!= 7.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:08	9.000000000e+00	!= 8.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:09	1.000000000e+01	!= 9.000000000e+00	p:81000084	&p:002c0900
ERR: 81000004:10	1.100000000e+01	!= 1.000000000e+01	p:81000084	&p:002c0900
ERR: 81000004:11	1.200000000e+01	!= 1.100000000e+01	p:81000084	&p:002c0900
ERR: 81000004:12	1.300000000e+01	!= 1.200000000e+01	p:81000084	&p:002c0900
ERR: 81000004:13	1.400000000e+01	!= 1.300000000e+01	p:81000084	&p:002c0900
ERR: 81000004:14	1.500000000e+01	!= 1.400000000e+01	p:81000084	&p:002c0900
ERR: 81000004:15	1.600000000e+01	!= 1.500000000e+01	p:81000084	&p:002c0900
ERR: 81000004:16	1.700000000e+01	!= 1.600000000e+01	p:81000084	&p:002c0900
ERR: 81000004:17	1.800000000e+01	!= 1.700000000e+01	p:81000084	&p:002c0900
ERR: 81000004:18	1.900000000e+01	!= 1.800000000e+01	p:81000084	&p:002c0900
ERR: 81000004:19	2.000000000e+01	!= 1.900000000e+01	p:81000084	&p:002c0900
ERR: 81000004:20	2.100000000e+01	!= 2.000000000e+01	p:81000084	&p:002c0900
ERR: 81000004:21	2.200000000e+01	!= 2.100000000e+01	p:81000084	&p:002c0900
ERR: 81000004:22	2.300000000e+01	!= 2.200000000e+01	p:81000084	&p:002c0900
ERR: 81000004:23	2.400000000e+01	!= 2.300000000e+01	p:81000084	&p:002c0900
ERR: 81000004:24	2.500000000e+01	!= 2.400000000e+01	p:81000084	&p:002c0900
ERR: 81000004:25	2.600000000e+01	!= 2.500000000e+01	p:81000084	&p:002c0900
ERR: 81000004:26	2.700000000e+01	!= 2.600000000e+01	p:81000084	&p:002c0900
ERR: 81000004:27	2.800000000e+01	!= 2.700000000e+01	p:81000084	&p:002c0900
ERR: 81000004:28	2.900000000e+01	!= 2.800000000e+01	p:81000084	&p:002c0900
ERR: 81000004:29	3.000000000e+01	!= 2.900000000e+01	p:81000084	&p:002c0900
ERR: 81000004:30	3.100000000e+01	!= 3.000000000e+01	p:81000084	&p:002c0900
ERR: 81000004:31	0.000000000e+00	!= 3.100000000e+01	p:81000084	&p:002c0900
81000084
81000104



Removing i2 loop yeilds expected behaviour:
Start
81000080
81000100
81000180
81000200
81000280
81000300
81000380
81000400
81000480
81000500
81000580
81000600


Switching to L1 memory yeilds expected behaviour:
Start
002c0380
002c0400
002c0480
002c0500
002c0580
002c0600
test.zip



Added crosscore version
[edited by: nulvinge at 8:49 AM (GMT -4) on 25 Sep 2020]