The very first call to our SPORT DMA data interrupt handler is delayed.
A couple of DMA buffers obviously already have been completed after startup (SPORT and DMA enable) before the interrupt handler will be called the first time.
we are using both Half SPORTs of a Full SPORT on SC589 with 1D DMA in Descriptor List Mode.
The Full SPORT used is SPORT4 on DAI1, one Half SPORT is for transmitting and one for receiving.
Both channels Primary and Secondary are used on both Half SPORTs.
Both Half SPORTs are externally clocked with the same clocks.
We operate with the very same 3 buffers for TX and RX:
E.g. while TX DMA operates on Buffer 1of3, RX DMA operates on Buffer 3of3 and so on...
Thus with no core interaction received data from RX will be looped back to TX - which works perfectly.
(No DMA Errors, No SPORT Errors, verified by comparing input to output data externally)
We later installed interrupt handler and enabled XCNT Interrupt on the DMA channel belonging to the RX Half SPORT.
This works as well - the handler will be called.
Problem in detail:
The very first call to our interrupt handler (after enabling DMAs and SPORTs) arrives unpredictably delayed.
While we would expect the very first buffer (first descriptor) to be completed while our handler is called the first time this is not true - it might be any one of the three available buffers.
We verify this by checking the corresponding DMA ADDRSTART register from within our interrupt handler.
All calls to our handler later on are in sync (regarding buffer order) and in time.
We can hear this effect as well:
Within the interrupt handler we swap received data for channels within the buffers (left <-> right).
Right after starting we hear TX data is 'as is' RX data for a short period of time.
Then the channel flip gets active: TX left is RX right.
It means: there is a delay before our interrupt handler will be used.
At the beginning a couple of buffers will be passed from RX to TX without the interrupt handler being called.
Do you have any idea how to fix this ?