I am trying to load LDR file containing code for SHARC by calling adi_rom_Boot from U-Boot with following parameters:
adi_rom_Boot(0x60000000 + offset, 0x40000000 | 0x20000000, 0, NULL, 0x207); // NORESET | RETURN, SPI2
It is working as expected for SPI offset less than 16 MiB (0x1000000), but when I try to load same LDR file located on higher offset, the processor goes to fault state most of the time (some addresses > 0x1000000 works, but mostly not).
Is adi_rom_Boot somehow limited to addresses < 16 MiB? We are using custom board with 64 MiB micron n25q512ax3 flash and ADSP-SC572. U-Boot nor Linux does not have problem with reading/writing at any offset on this flash...
to answer my own question - AFAIK it is not possible. I connected logic analyzer on SPI and it looks like the ROM API uses only 3B address mode. So it can access only lower 16 MiB of memory. When…
Hi,Apologies for delayed response.Should be able to workaround this by using the hook routines and then modifying the SPI controller memory mapped settings to handle transmission of 4 address bytes instead…
Hi,1) What kind of booting is used?2) What is the size of SPI flash is used? What is the size of you application or .ldr file?3) Refer ADSP-SC57x HRM topics "Load Function" and "Error Handler" in Section: 46, Page no: 2789 & 2790.www.analog.com/.../adsp-sc57x-2157x_hwr.pdf4) Please refer EE-384 in below link:www.analog.com/.../EE384v01.pdfRegards,Anand Selvaraj.
1) we are booting LDR containing U-Boot (core 0) from SPI flash. Via U-Boot we are calling ROM API to boot another LDR (sharc - core1) also from SPI flash. Used adi_rom_Boot() parameters are listed in first post
2) Our SPI flash has 64 MiB. Size of LDR containing code for core1 (SHARC) has about 250 KiB.
3,4) Ok, I will take a look.
the ADSP-SC57x/ADSP-2157x SHARC+ Processor document says: "The default error handler eventually puts the core into an idle state", but processor goes into fault state. Therefore I suppose this kind of error can not be handled. I also could not find anything about 16 MiB limit of adi_rom_Boot(). Is it supposed to work on whole range of flash memory?
Hi Jan,1) Can you share the code?2) Are you using Linux or windows?3) Can you first try with simple LED application? Then try to boot with the intended application.4) Is it working with debugging mode?Regards,Anand Selvaraj.
to answer my own question - AFAIK it is not possible. I connected logic analyzer on SPI and it looks like the ROM API uses only 3B address mode. So it can access only lower 16 MiB of memory. When you call rom api to boot from 0x1080000, it will boot from 0x0080000 instead (the upper address byte is ignored).
Also ROM API every time reads one byte from address 0 (for unknown reason to me).