I am trying to load LDR file containing code for SHARC by calling adi_rom_Boot from U-Boot with following parameters:
adi_rom_Boot(0x60000000 + offset, 0x40000000 | 0x20000000, 0, NULL, 0x207); // NORESET | RETURN, SPI2
It is working as expected for SPI offset less than 16 MiB (0x1000000), but when I try to load same LDR file located on higher offset, the processor goes to fault state most of the time (some addresses > 0x1000000 works, but mostly not).
Is adi_rom_Boot somehow limited to addresses < 16 MiB? We are using custom board with 64 MiB micron n25q512ax3 flash and ADSP-SC572. U-Boot nor Linux does not have problem with reading/writing at any offset on this flash...