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L1 MULTI-MEMORY SPACE in app.ldf

Hi
I have to customize app.ldf for ADSP-SC584.
Is it possible to define a segment on L1 MULTI-MEMORY SPACE?

Best Regards
amsk

  • Hi AMSK,

    Could you confirm that are you looking to create a new section/segment in L1 of SHARC using app.ldf, then place a specific code or data to be processed from the new section?


    If yes, as we have created some sections in the L1 memory of SHARC0 in app.ldf file as given below,

    For instance:
    mem_block2_bw_0 { TYPE(BW RAM) START(0x00300000) END(0x00300fff) WIDTH(8) }
    mem_block2_bw_1 { TYPE(BW RAM) START(0x00301000) END(0x00301fff) WIDTH(8) }
    mem_block2_bw_2 { TYPE(BW RAM) START(0x00302000) END(0x00302fff) WIDTH(8) }

    Corresponding input sections are made as given below.

    test_bank0
    {
    INPUT_SECTIONS( $OBJS_LIBS( test_bank0) )
    } > mem_block2_bw_0

    test_bank1
    {
    INPUT_SECTIONS( $OBJS_LIBS( test_bank1) )
    } > mem_block2_bw_1

    Now the buffers can be declared as shown below using #pragma,

    #pragma section("test_bank0")
    int Buff_0[Buff_Size]; //Declaring a buffer in SHARC L1 block2 bank0.

    #pragma section("test_bank1")
    int Buff_1[Buff_Size]; //Declaring a buffer in SHARC L1 block2 bank0.

    This will make sure that the buffer start address is corresponding to the section start address and also it is applicable when delcaring a function too.

    Regards,
    Jithul

  • Hi Jithul,

    Thank you for responding.

    > Could you confirm that are you looking to create a new section/segment in L1 of SHARC
    > using app.ldf, then place a specific code or data to be processed from the new section?
    No.
    I am looking to create a new section/segment in L1 of other SHARC core using app.ldf.
    For instance:
    mem_block0_sharc1_bw { TYPE(BW RAM) START(0x28A40000) END(0x28A6FFFF) WIDTH(8) }

    However, this causes the following error:
    [Error el2011]  Invalid memory range and/or width for memory 'mem_block0_sharc1_bw'
    Block outside defined memory regions

    Best Regards
    amsk

  • Hello,

    Please note that the address range you provided is the mutiprocessor memory space of L1. When you define the L1 memory you have to use its private memory space, see the image below.

    For more information about multiprocessor space, refer the below FAQ.

    https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/5041/faq-what-is-multiprocessor-offset-in-adspsc58x-adsp-215xx-processors

    Best Regards,

    Jithul

  • Hello

    Thank you for the help.


    "When you define the L1 memory you have to use its private memory space"
    I understood the answer.
    Is there any document describes it?

    Best Regards
    amsk

  • Hi

    Can you please answer this question

    "Is there any document describes it?"

    regards

    amsk

  • Hi Amsk,

    n the datasheet "Figure 5. ADSP-SC58x/ADSP-2158x Memory Map" describes the memories associated with ADSP-SC58x/ADSP-2158x processor.

    Also, it is detailed under "SYSTEM MEMORY MAP", 'Table 4. L1 Block 0, Block 1, Block 2, and Block 3 SHARC+ Addressing Memory Map (Private Address Space)'  and 'Table 6. SHARC+ L1 Memory in Multiprocessor Space'.

    Best Regards,

    Jithul

  • Hi

    That does not answer my question.

    My question is Is there any document describes "When you define the L1 memory you have to use its private memory space".

    regards

    amsk