Hi,
I am using 21835-SOM board.I found that the serial port cannot communicate properly.
Please help me check the code.
Regards,UARTDMAMode.rar
Bingo
| SLA Status | Assignee | Support Status |
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Closed | |
ADSP-21835
Recommended for New Designs
The ADSP-2183x/ADSP-SC83x digital signal processors (DSPs)
are members of the SHARC®-FX family of products. The
SHARC-FX core uses a single-instruction...
Datasheet
ADSP-21835 on Analog.com
Hi,
I am using 21835-SOM board.I found that the serial port cannot communicate properly.
Please help me check the code.
Regards,UARTDMAMode.rar
Bingo
Hi Bingo,
Could you please provide more information about the exact issue you are facing, so we can assist you more effectively?
Additionally, please confirm whether the example provided in the ADSP-SC8xx BSP is working as expected.
Regards,
Nandini C
Hi,
My code only uses uart0 and connected to PC via USBC,have the processor return the received data.But the processor did not return any data.
I only have adsp21835w-ev-som board,so I can not verify UART project in ADSP-SC8xx BSP.
Regards,
Bingo
Hi Bingo,
As per the ADSP-21835 SOM schematic, the P1 connector is used for USB power.
https://www.analog.com/media/en/technical-documentation/eval-board-schematic/adsp21835w-ev-som-schem.pdf
Could you please let us know the revision of your ADSP-21835 SOM board. Also, could you please confirm whether you have access to the below "EV-SOMCRR-EZKIT" and "EV-SOMCRR-BRKOUT" boards.
EV-SOMCRR-EZKIT: https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ev-somcrr-ezkit.html
EV-SOMCRR-BRKOUT: https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ev-somcrr-brkout.html
If you have the above boards, can you please check the UART test available in the POST example. As mentioned in the Readme file, connect the UART cable between PC and FTDI USB-UART connector. Please follow the "Readme_Power_On_Self_Test_21835.html" available in the BSP package. Please download and install the ADSP-SC83x/ADSP-2183x BSP from the below link.
https://www.analog.com/en/design-center/evaluation-hardware-and-software/software/software-download.html?swpart=SD_FCD4ML2
After installation, the POST example can be available in the below path.
[Installation directory]:\Analog Devices\EV-SC8xx_EZ-KIT-Rel1.0.0\EV-SC8xx_EZ-KIT\Examples\Power_On_Self_Test
Regards,
Nandini C
Hi,
I do not have EV-SOMCRR-EZKIT and EV-SOMCRR-BRKOUT.Revision of my ADSP-21835 SOM board:REV B Z.core read/write mode can transmit and receive data normally,but DMA mode can not.It can be confirmed that the hardware is functioning normally.I suspect it's a driver issue.
Regards,
Bingo
Hi Bingo,
We have tested the UART DMA example available in the BSP and it works as expected.
Could you confirm whether you are able to run the core read/write example without using the EV-SOMCRR-EZKIT and EV-SOMCRR-BRKOUT boards? Also, please let us know which core read/write example you are testing, along with the steps and the hardware connections you followed.
Regards,
Nandini C
Hi,
Here is my code,please try it.The picture is my hardware connection.There are 2 mode in the code:core read and DMA read.while in core read mode,DSP can echo back to computer what have received,but DMA read mode can not.
Regards,
Bingo
Hi Bingo,
Please provide more information on below points to assist you better on this.
1) Please provide the steps you have followed to test the example.
2) Can you share the screenshot of the output that is echoed back to the computer.
3) Can you share the screenshots of the register browser window showing the UART control and status register configuration for both core mode and DMA mode.
4) Please let us know which UART terminal(eg. Termite, Putty, Teraterm) you are using, along with its configuration.
Regards,
Nandini C
Hi,
Could you please tye my code,You can use any UART terminal.
regards,
Bingo
Hi,
Test steps:
1.run the example code first
2.send 8 bytes by UART terminal
UART terminal config:
baudrate:57600
stop bit:1
data bit:8
parity:none
I can not find UART registers:

Core mode screenshot of UART terminal:

DMA mode screenshot of UART terminal:

Regards,
Bingo
Hi Bingo,
Thank you for sharing the information.
Please find the UART register in the Peripherals view, which displays each peripheral and its memory-mapped registers. Please follow the below step to find the Peripherals view.
Window -> Show View -> Other -> Debug -> Peripherals
We tested the code with the configurations you provided, but no output was received. Could you please try using the terminal like Tera Term, putty, etc and let us know if you get the same result.
Please note that there are no data lines available on the P1 connector. The P1 connector is used solely to power the ADSP-21835 SOM board. Please find the below schematic for reference.

We understand that you do not have the EV-SOMCRR-EZKIT and EV-SOMCRR-BRKOUT boards along with the ADSP-21835-SOM board. Please confirm.

Regards,
Nandini C
Hi,
1.I do not have the EV-SOMCRR-EZKIT and EV-SOMCRR-BRKOUT.
2.there is a USB to UART chip on ADSP-21835 SOM board,please check you USB cable.

3.echo received by putty,uart in core mode

4. register view of core mode

5.register view of DMA mode

6.no echo in DMA mode,but receiving Interrupt happened.

Hi,
1.I do not have the EV-SOMCRR-EZKIT and EV-SOMCRR-BRKOUT.
2.there is a USB to UART chip on ADSP-21835 SOM board,please check you USB cable.

3.echo received by putty,uart in core mode

4. register view of core mode

5.register view of DMA mode

6.no echo in DMA mode,but receiving Interrupt happened.

Hi Bingo,
We are checking this internally and will get back to you as soon as possible.
Regards,
Nandini C
Hi,
May I ask if there has been any progress?
Regards,
Bingo
Hi,
Apologies for the delay caused.
We were able to simulate your issue on our end; we are checking and will get back to you as soon as possible.
Regards,
Nandini C
Hi,
Please refer the attached example demonstrates the usage of baud rate detection automatically using “UART DMA” mode to scan the keyboard alphabets and send them onto a Terminal emulator such as TeraTerm.UART_DMA_Autobaud_SC835_SHARCFX_Core1.zip
Please open a serial terminal application (for example PuTTY or TeraTerm) and configure a serial connection to the COM port with the settings as shown below:
Bits Per second = Set any baud rate, range between 110 to 115200 bps
Data bits = 8
Parity = None
Stop bits = 1
Flow Control = None
And follow the below steps:
1. Open a terminal emulating tool such as tera term on PC and set the baud rate at which communication needs to be established.
2. Run the example and enter "@" in the terminal emulator window so that the example can detect the baud rate and it will be displayed on the console window as "Detected Baudrate is xx"
3. Any key pressed through keyboard will be displayed on the console window and to exit from this program press "Enter".
Please run this example and let us know if any assistance is required.
Regards,
Nandini C
Hi,
Why must the receive buffer be placed in the L1 RAM?Does this have to do with the cache settings?
Where can the cache settings be modified?
Regards,
Bingo
Hi Bingo,
Please find the attached example code where the buffer is placed in L2 memory. Please ensure that the cache management API is properly configured and the buffers are aligned to cache line boundaries when the cache is enabled.
6012.UART_DMA_Autobaud_SC835_SHARCFX_Core1.zip
The ADI_CACHE_MANAGEMENT macro defined in the "adi_pdma_config_SC8xx.h" file enables/disables cache management by the driver.
Aligning buffer memory to cache line boundaries ensures that cache maintenance operations apply to the buffer memory alone, and not operate on unrelated data that may inadvertently share memory space on that cache line. This may not be an issue for most applications, but it can cause problems if adjoining, misaligned memory is also being accessed or written off-core, possibly by DMA or by another processor core.
Regarding "Where can the cache settings be modified?"
>> In order to configure cacheable and non-cacheable ranges, or otherwise change the cacheability settings of specific regions of memory, use the Startup Code/LSP Add-in to configure the cache settings for each memory segment. The settings are accessed by double-clicking on a memory segment to edit it, then clicking the Edit button next to "Access Properties" to change the MPU settings for the segment.
For more information, please refer the below CCES help path.
CrossCore® Embedded Studio 3.0.1 > SHARC®-FX Development Tools Documentation > CrossCore Embedded Studio SHARC+ to SHARC-FX Migration Guide > Configuring cache settings on SHARC-FX
Regards,
Nandini C