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SHARC core affinity setting

Category: Software
Product Number: ADSP-SC598
Software Version: Firmware code running on SC598 EV SOMCRR EZKIT.

Upon increasing workload in our bench we notice the CPU is busy only in serving ISR and does not execute main entry of C code. We would like to set the ISR to one SHARC core of ADSPSC598 and the other core to serve main entry of C.

We are also interested to execute from ARM core of SC598. Can you share some examples for SC598 which will execute different workloads in 3 cores of SC598.

we noticed two examples under EV-SC59x_EZ-KIT\Examples\Multi-core\int\SwRaiseInterCoreInt but we dont see 'adi_sport_RegisterCallback' which is what we look for and this is what consuming the CPU more than 99%



added information about sport register callback
[edited by: SKG at 8:43 AM (GMT -4) on 2 Jul 2024]