Hi,
We are using the ADSP-SC594 processor with the IS43TR16128DL-125KBL-TR DDR.
We have followed both the Hardware Reference and the EE442 application note (with the Anomoly 20000117 - DMC PHY Calibration issue).
We can't seem to get rid of an issue regarding writing to the DDR, which seems to do weird but mainly predictable things:
- Writes go to the memory address 4-bytes above and copy with it all values in the 4-bytes surrounding:
- The bytes 1-3 (starting from 0) every 32-bytes are not affected:
- Byte 0 every 32-bytes, gets corrupted sometimes as part of the write:
The only config values we have changed from the "adi_dmc_SC594_family_800MHz_config.h" is the CFG0_BIT_DMC_TR1_TRFC (which has been changed from 280 to 128) and the CFG0_BIT_DMC_CFG_SDRSIZE (changed to ENUM_DMC_CFG_SDRSIZE2G).
We had the non low-power model (IS43TR16128D-125KBL-TR) working with the ADSP-SC584, so we are unsure why this hasn't been an easy port over.
Any help on this would be greatly appreciated!
Thank you,
Ben
