the bit clk and fs clk are externally provided, if I set sport0A as a rx, do I need to call adi_sport_ConfigClock() and adi_sport_ConfigFrameSync() ?

5angxr

on Apr 16, 2024

Category: Software

Product Number: ADSP-21593

the bit clk and fs clk are externally provided, and there are 2 data inputs.

this is my code:

```

SRU(LOW, DAI0_PBEN07_I);
SRU(LOW, DAI0_PBEN08_I);
SRU(LOW, DAI0_PBEN03_I);
SRU(LOW, DAI0_PBEN02_I);

SRU(DAI0_PB07_O, SPT0_ACLK_I);

SRU(DAI0_PB08_O, SPT0_AFS_I);

SRU(DAI0_PB03_O, SPT0_AD0_I);
SRU(DAI0_PB02_O, SPT0_AD1_I);

adi_sport_Open(0, ADI_HALF_SPORT_A, ADI_SPORT_DIR_RX, ADI_SPORT_I2S_MODE, MemSPT_rx0, SPORT_MEMORY_SIZE, &hSPT_rx0);

adi_sport_ConfigData(hSPT_rx0, ADI_SPORT_DTYPE_ZERO_FILL, 31, false, false, true);

// adi_sport_ConfigClock(hSPT_rx0, 1, false, false, false); -> do i need to call this function?

// adi_sport_ConfigFrameSync(hSPT_rx0, 64, false, false, false, false, true, true); -> do i need to call this function?

adi_sport_DMATransfer(hSPT_rx0, spt_rx0_dma_list, BUF_NUM, ADI_PDMA_DESCRIPTOR_LIST, ADI_SPORT_CHANNEL_PRIM_SEC);

adi_sport_CreateGlobalGroup(&hSPT_rx0, 1, &hSPT_group1_rx, false, true);

adi_sport_GlobalRegisterCallback(hSPT_group1_rx, SPT_group1_rx_cb, &i2s_handle);

adi_sport_GlobalEnable(true);

```

in the example "GBL_Audio_Talk_I2S_21593_Core1", adi_sport_ConfigClock() and adi_sport_ConfigFrameSync() are not called. but it works fine.

Under what circumstances should I call adi_sport_ConfigClock() and adi_sport_ConfigFrameSync() to config Clock and FrameSync?

removed code for language
[edited by: GenevaCooper at 2:28 PM (GMT -4) on 16 Apr 2024]

Tags: Audio Signal Processors software SHARC Audio Processors/SoCs adsp-21593

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