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EMDMA CTL.DMAS1 bit stuck.

Category: Software
Product Number: ADSP-21584

Hi there,

We're using the EMDMA feature in a product, and are experiencing an obscure bug that happens occasionally when trying to reset the EMDMA.

We are using the EMDMA in the Scatter/Gather mode. During certain user interactions, we need to reset the EMDMA, setting up new TCBs. The code we use for resetting the EMDMA is as follows (simplified for the sake of the example):

// Wait until EMDMA isn't busy anymore
bool emdmaBusy = true;
while(emdmaBusy)
{
	int ctl = (_configuration._deviceNum == EMDMAConfiguration::DeviceNumber::eEMDMA0) ? *pREG_EMDMA0_CTL : *pREG_EMDMA1_CTL;
	emdmaBusy = ((ctl & (BITM_EMDMA_CTL_DMAS0 | BITM_EMDMA_CTL_DMAS1)) != 0);
}

// Reset DMA
*pREG_SPU0_SECUREP158 = 0x2; // security unlock both emdma channels

_firstTcb = nullptr;
_lastTcb = nullptr;

*pREG_EMDMA0_CTL = 0;
*pREG_EMDMA0_INDX1 = 0;
*pREG_EMDMA0_MOD1 = 0;
*pREG_EMDMA0_CNT1 = 0;
*pREG_EMDMA0_INDX0 = 0;
*pREG_EMDMA0_MOD0 = 0;
*pREG_EMDMA0_CNT0 = 0;
*pREG_EMDMA0_CHNPTR = 0;
*pREG_EMDMA0_BASE = 0;
*pREG_EMDMA0_TPTR = 0;
*pREG_EMDMA0_BUFLEN = 0;
*pREG_EMDMA0_TCNT = 0;

*pREG_EMDMA0_CTL =  BITM_EMDMA_CTL_EN        // enable
				  | BITM_EMDMA_CTL_CHEN    // chaining enable
				  | BITM_EMDMA_CTL_CBEN    // circular buffer enable
				  | BITM_EMDMA_CTL_TLEN    // tab-list enable
				  | BITM_EMDMA_CTL_OFCEN;  // on-the-fly control loading
				  
				  
// Add new TCBs...

Usually, this goes well. However, very rarely, we experience that we never move past the emdmaBusy-check, as the DMAS1 bit of the corresponding CTL register keeps being 1.

We have tried also checking the status of the CHS bit in the CTL register in addition to the DMAS0 and DMAS1 bits, but that unfortunately does not help.

As mentioned, this happens very sporadically, leading me to suspect that it is somehow related to timing.

Does anyone have a clue what we might be doing wrong? Or has anyone experienced something similar?

BR,

Mathias.

Parents
  • I'm experiencing the same behavior with the DMAS1 bit not clearing, even though the copied data is verified to be completed and correct. This issue occurs sporadically after many successful transactions. This happens for chained and non-chained transactions.

    As a workaround, I've implemented a check for REG_EMDMA0_CNT0 == 0 instead of relying on BITM_EMDMA_CTL_DMAS1. Besides that I'm still checking BITM_EMDMA_CTL_CHS and BITM_EMDMA_CTL_DMAS0.

    The MDMA registers don't exhibit any stuck bit behavior and provide better performance, so I recommend migrating to MDMA. However, it would be nice if the underlying EMDMA issue could be investigated.

Reply
  • I'm experiencing the same behavior with the DMAS1 bit not clearing, even though the copied data is verified to be completed and correct. This issue occurs sporadically after many successful transactions. This happens for chained and non-chained transactions.

    As a workaround, I've implemented a check for REG_EMDMA0_CNT0 == 0 instead of relying on BITM_EMDMA_CTL_DMAS1. Besides that I'm still checking BITM_EMDMA_CTL_CHS and BITM_EMDMA_CTL_DMAS0.

    The MDMA registers don't exhibit any stuck bit behavior and provide better performance, so I recommend migrating to MDMA. However, it would be nice if the underlying EMDMA issue could be investigated.

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