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ccsfp

Category: Software
Product Number: ADSP-SC598
Software Version: CrossCoreUtilities-Rel1.7.1

Hi

We are using ccsfp to test our hardware on the production line.

It runs from flash correctly.
To speed up the production line we wish to run this from RAM, to avoid a lengthy flash erase.
We have changed the code to use "uartslave" in order to work from ram.
simple programs work, but not the production test code.

I came across a note on this ADI forum which says:
If your boot stream includes an Init Code DXE (ours does), the host will need to cease transmission.
If you have RTS hooked up, the host can pause on the CTS signal while the Init Code executes
(it will get 'clear to send' once the init code >has executed and the boot kernel has resumed waiting for data),
otherwise you should just withhold transmission after transmitting a block with the INIT flag set.

We have implemented RTS/CTS as a mockup on our board but it still fails.
We don't see  CTS change state.
We are talking to a ROM based firmware for which we have no source code.
Can you advise us how to investigate / solve this issue.

Regards Chris 

Thread Notes

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  • Sorry, ccsfp does not currently implement RTS/CTS hardware flow control. We do have an open issue for this.

  • Hi Andy

    Thanks for the reply.
    I was meaning the sc598 ROM bootloader was also not controlling CTS / RTS.
    We have ccsfp source code and could probably solve that part.

    How do we force the sc598 ROM bootloader to use RTS/CTS ?

    Regards Chris

  • Hi,

    When the UART is enabled, the RTS goes immediately low, encouraging the host to send the first boot stream data. When the boot kernel is processing fill or Initcode blocks, it can require extra processing time and must delay the host from sending more data. This request is signaled using the RTS output.

    Once the Boot ROM start executing the init code, it will de-assert the RTS informing the host that it is not ready to accept any data. So if RTS of the slave DSP is connected properly to the CTS of the host, then we should see the corresponding change in the CTS as well.

    We would suggest you to refer the "UART Controller Boot Mode" section in ADSP-SC59x HRM linked below.
    www.analog.com/.../adsp-sc595-sc596-sc598-hrm.pdf

    Also, here we have attached the Python script, which can be used to send the loader to the DSP through serial port, where we can prove that, to boot with an initcode, flow control needs to be enabled.

    Please use this as a reference and modify as per your requirement.

    Regards,
    Ranjitha.R

    uartbootloader.zip

Reply
  • Hi,

    When the UART is enabled, the RTS goes immediately low, encouraging the host to send the first boot stream data. When the boot kernel is processing fill or Initcode blocks, it can require extra processing time and must delay the host from sending more data. This request is signaled using the RTS output.

    Once the Boot ROM start executing the init code, it will de-assert the RTS informing the host that it is not ready to accept any data. So if RTS of the slave DSP is connected properly to the CTS of the host, then we should see the corresponding change in the CTS as well.

    We would suggest you to refer the "UART Controller Boot Mode" section in ADSP-SC59x HRM linked below.
    www.analog.com/.../adsp-sc595-sc596-sc598-hrm.pdf

    Also, here we have attached the Python script, which can be used to send the loader to the DSP through serial port, where we can prove that, to boot with an initcode, flow control needs to be enabled.

    Please use this as a reference and modify as per your requirement.

    Regards,
    Ranjitha.R

    uartbootloader.zip

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