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Cache Address Range-Based Locking

Cache Locking:

Locking is used to avoid thrashing and ensure that useful buffers remain in the cache. For example, locking might be used before execution of a loop that would continuously result in thrashing. The cache can be completely invalidated (flushed) and one or both ways can be locked. Within the loop, as the instruction or data in the working set is accessed, the cache gets filled. Once the relevant ways are full, additional accesses result in a miss but no replacements. When both ways in cache contain valid data, are locked, and there is a read/write miss, that request is directly serviced by external memory.

There are two methods of locking supported:
• Way-Based Locking — each way of the DM/PM/I-cache can be independently locked. While locked, a valid line in the respective way is not replaced. However, invalid cache lines of a locked way can be filled.

• Address Range-Based Locking — a data buffer or a section of code can be locked using range registers. A pair of range registers is selected to define lockable data and code ranges.

Refer the attached example for Locking of Data Cache By Address range. By default, this example works without locking.
For locking, define macro "LOCK".

Cache_lock_GUL.zip

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