How important is additional filtering on VDD_PLL and VDD_FPLLANA?

Dear Customer,

The voltage specification for VDD_PLL is the same as for VDD_INT in terms of voltage, which is 1V.
The voltage specification for VDD_FPLLANA is the same as for VDD_REF in terms of voltage, which is 1.8 V.

However, acceptable ripple tolerance on VDD_PLL/ VDD_FPLLANA balls is less when compared to VDD_INT/ VDD_REF balls.

According to the ADSP-SC83x Designer Quick Reference,

For VDD_FPLLANA:
VDD_REF can be used to source VDD_FPLLANA. For lower noise on VDD_FPLLANA, filtering on VDD_REF is recommended before connecting to VDD_FPLLANA.

For VDD_REF:
Connect to VDD_INT. For lower noise on VDD_PLL, filtering on VDD_INT is recommended before connecting to VDD_PLL.

Please refer Table 22 on the page no 52/124 in the below linked datasheet for ripple tolerance requirements
https://www.analog.com/media/en/technical-documentation/data-sheets/adsp-2183x-adsp-sc83x.pdf

Regards,
Nandini C

Nandini,

I don't see anything in the datasheet about ripple tolerance. All I see is what I and you already stated - filtering is recommended.

Recommended != Required, so it would be nice to know what is actually necessary here.

Dear Customer,

These are required and the PLL operations in these parts are susceptible to noise.

Regards,
Nandini C

Dear Customer,

These are required and the PLL operations in these parts are susceptible to noise.

Regards,
Nandini C