Hi there,
I have to implement booting the DSP from an MCU as a SPI host and am referring to the SPI host boot example found here:
There's a zip attached to that page with a.o. a file Spi.c which handles the transfer of the boot image to the DSP.
- I don't find any consideration of the 1024 rule (only transfer data in multiples of 1024) but, never mind. If it's working without it, fine.
- Check this code which sends the LDR file
unsigned int i;
void Send_LDR(void)
{
while(((*pREG_SPI2_STAT & ENUM_SPI_STAT_NOSTALL)>>BITP_SPI_STAT_FCS)==1); // check ready or stalled
Select_Slave();
Send_single_byte(0x03); /* standard speed */
Deselect_Slave();
for(i=0; i<sizeof(tx_buf); i++)
{
while(((*pREG_SPI2_STAT & ENUM_SPI_STAT_NOSTALL)>>BITP_SPI_STAT_FCS)==1); // check ready or stalled
Select_Slave();
while(((*pREG_SPI2_STAT & ENUM_SPI_STAT_NOSTALL)>>BITP_SPI_STAT_FCS)==1); // check ready or stalled
Send_single_byte(tx_buf[i]);
Deselect_Slave();
}
}
- Is it really necessary to check for the RDY pin before and after asserting the select signal. Is there a possible condition where the RDY pin might be deasserted after selecting the target DSP? Since the target is a 21569 as well: do I have to do this in my MCU code when booting the DSP in this mode?
- Next: each byte is sent with a select cycle but as I understood, it should be possible to leave the select signal asserted during the whole transfer as shown here (hardware reference manual figure 40-7 page 40-23)
- Similar question, in the following code which sends one byte:
unsigned int delay;
void Send_single_byte(unsigned char Databyte)
{
*pREG_SPI2_TWC = 1; // single byte instruction, no addr/data
*pREG_SPI2_TFIFO = Databyte; // command ID
while(!((*pREG_SPI2_STAT & BITM_SPI_STAT_TF)>>BITP_SPI_STAT_TF)); // wait till completion
*pREG_SPI2_STAT = BITM_SPI_STAT_TF; // clear latch
delay = 0xFF;
while(delay--);
}
- Is the delay of 0xff cycles necessary here after clearing the transfer finished bit in the status register?
Best regards,
Rainer
