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SRU configure for ADSP-21569


     I have a problem about configure SRU for ADSP-21569

due to project designed DAI0_PIN01 - DAI0_PIN09 is I2S input, and DAI1_PIN01 - DAI1_PIN10 is I2S output

like as photo

I had refer EZ-KIT reference sample code of Audio_Passthrough_I2S_21569, but they are I2S in/out within DAI1,

and sample code is work fine in EZ-KIT ADSP-21569.

(1) how could I configure SRU for passthrough first like as sample code of Audio_Passthrough_I2S_21569?



SRU2(DAI1_PB05_O,SPT4_ACLK_I); /*DAC clock to SPORT 4A*/
SRU2(DAI1_PB05_O,SPT4_BCLK_I); /*DAC clock to SPORT 4B*/


SRU2(SPT4_AD0_O,DAI1_PB01_I); /* SPORT 4A to DAC*/

#if defined(__ADSP21566__)|| defined(__ADSP21567__) || defined(__ADSP21569__)
SRU2(DAI1_PB05_O,DAI1_PB12_I); /*DAC clock to ADC */
#elif defined(__ADSP21562__)|| defined(__ADSP21563__) || defined(__ADSP21565__)
SRU2(DAI1_PB05_O,DAI1_PB09_I); /*DAC clock to ADC */

SRU2(DAI1_PB04_O,DAI1_PB20_I); /*DAC FS to ADC */


(2) in this designed, there are used MCLK, how about this PIN configure? 

Thank you~

  • Hi,

    SRU macro used to connect the source and destination signals of DAI0, DAI1, and between DAIs (DRU).  The SRU() macro is used to configure the SRU contained in DAI0.  The SRU2() macro is used to configure the SRU contained in DAI1.

    SPORT0-3 signal can be routed using DAI0. SPORT4-7 signals can be routed using DAI1.

    As you have used DAI0 as I2S input, and DAI1 as I2S output. You have to choose SPORT0-3 for I2S input and  SPORT4-7 for I2S output I2S output.

    Below is an example which configures SPORT0 A used to transmit data to DAC and SPORT4 A used to receive data from ADC.


    //SPORT0 A used to transmit data to DAC
    SRU(DAI0_PB05_O,SPT0_ACLK_I);// CLK to SPORT 0A SRU(DAI0_PB06_O,SPT0_AFS_I);// FS to SPORT 0A SRU(SPT0_AD0_O, DAI0_PB01_I);// SPORT 0A data to DAC

    SRU(LOW, DAI0_PBEN05_I);
    SRU(LOW, DAI0_PBEN06_I);
    SRU(HIGH, DAI0_PBEN01_I);    
    //SPORT4 A used to receive data from ADC SRU2(DAI1_PB05_O,SPT4_ACLK_I);// CLK to SPORT 4A SRU2(DAI1_PB06_O,SPT4_AFS_I);// FS to SPORT 4A SRU2(DAI1_PB01_O,SPT4_AD0_I);// Data to SPORT 4A


    Regarding MCLK pin configure, can you please explain your query in detail.

    Anand Selvaraj.

  • hi 

       thanks for you reply,

    for cross from DAI0 to DAI1, I have work by

    SRU(LOW, DAI0_PBEN05_I); // input BCLK from DAI0_PB05

    SRU2(HIGH, DAI1_PBEN05_I); // output BCLK

    SRU2(DAI1_CRS_PB05_O, DAI1_PB05_I); // cross to DAI1_PB05_I

    and measure wave is work fine, also others clk.

    but I have others problem by SPT4_AD0_O to DAI1_PB01_I,

    yellow color is normal output and have audio, but white color is my SPT4_AD0_O to DAI1_PB01_I just plus only and no audio. could you know which one setting wrong?

  • Hi,

    To assist you better can you please share details about your application with Block diagram.
    Which SPORT are you using for Transmitting data to DAC?
    Which SPORT are you using for Receiving data from ADC?
    How do you transfer the data from SPORT to SPORT.
    Did you get correct values in SPORT Receive buffer.

    yellow color is normal output and have audio, but white color is my SPT4_AD0_O to DAI1_PB01_I just plus only and no audio. could you know which one setting wrong?
    >> We are not get your point here. In which point did you get normal output like output of ADC, SPORT Receive buffer.

    If possible can you please share you project.

    Anand Selvaraj.

  • Hi,

        sorry reply late,

    our system is simple, 4xI2S input from DAI0, and 3xI2S output to DAI1(like as above schematic)

    I just reference EZ-KIT sample code of Audio_Passthrough_I2S_21569 to re-configure SRU_init and remark non-used function.

    for yellow wave that is DAI0(I2S data input), for white wave that is DAI1(I2S data output) 

    Although I could work via extra -configure adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync,

    But I don't understand below point?  

    1. why EZ-KIT is work by origin sample code, and we need extra-configure adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync?

    2. adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync's parament how do we know which value is correct for our project?

    3. for ADI_SPORT_EVENT_RX_BUFFER_PROCESSED event, when is callback time?

    I mean is it iSRC_LIST_1_SP4B.pStartAddr =(int *)int_SP0ABuffer4 and iSRC_LIST_2_SP4B.pStartAddr =(int *)int_SP0ABuffer5 both full to call callback or 1of 2 buffer full call callback?

    attach project code for you reference,

  • Hi,

    1. why EZ-KIT is work by origin sample code, and we need extra-configure adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync?
    >> SSLDD 3.0 Device Drivers support the static configuration of the peripherals i.e. users can provide the required configuration parameters beforehand so that device driver can configure the peripheral in the initialization API. Static configuration header files contain set of configuration macros which device drivers use to configure the peripheral.

    In example project Audio_Passthrough_I2S_21569 > system > drivers > sport > adi_sport_config_2156x.h  file contains configurations of SPORT 4A and 4B. So, adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync are not required.

    2. adi_sport_ConfigData/adi_sport_ConfigClock/adi_sport_ConfigFrameSync's parament how do we know which value is correct for our project?
    >> Please refer "Half SPORT 'A' Control Register/Half SPORT 'B' Control Register" in HRM for detailed decription of each bit. From that you can choose suiltable options for your project

    3. for ADI_SPORT_EVENT_RX_BUFFER_PROCESSED event, when is callback time?
    >> ADI_SPORT_EVENT_RX_BUFFER_PROCESSED event will occur when one of the buffer is processed.

    We are looking your project and get back to you if we have any suggestions.

    Anand Selvaraj.

  • Hi,

       very thanks for your reply,

    let I could get some things to learn.