For applications that have code and/or constant data that do not fit into the on-chip SRAM space, additional features have been added to allow the core to efficiently access SPI flash memory space. There are serial memory blocks which are available such that they are directly addressable by the core. Because these memories are addressable by the core without additional driver software overhead, direct code execution is available as a built-in feature. This feature can only be accessed through SPI 2.
