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Open Questions
ADZS-21569-EZ-KIT: why is VDD_REF coming from a ($$) 1.8V linear reg. when ADP5054 is already generating 1.8V?
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8 months ago
Disconnecting DAI
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5 hours ago
locking cache with program memory from DDR external memory
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10 hours ago
ADC + DMA example
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7 days ago
21569 ASRC + TDM Questions
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1 day ago
Review schematics & PCB Artwork using ADSP-SC589KBCZ-4
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3 months ago
ADSP-SC589 powered up and IC1000 debugger running, but LEDS won't blink (almost dead).
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3 days ago
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ADSP-SC5xx/ADSP-215xx
EngineerZone technical forum that provides customer support for Analog Devices ADSP-SC5xx/ADSP-215xx products.
Jan 21, 2021 79401 members
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Inquiries about Sample rate converter of ADSP-21488
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on 11 Dec 2020
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SC589 Maximum SPORT SCLK frequency
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WA_02000014 on 21160
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How does SYS_CLKIN0 affect boot modes of the SC58x?
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on 9 Nov 2020
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Answered
Sync PWM0 and PWM1 in ADSP21584
+1
407
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External Pull-up resistor value for ADSP-21364 DAI_Px pin
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software reset on sharc after second stage loaders
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ADZS-21479-EZLITE TWI Simple code for CCES
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Answered Questions
Answered
How to use cfftf (filter.h) correctly on a SHARC 21569?
0
1370
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2
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on 30 Apr 2020
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FrankPeng
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Reference PCB Layout Available?
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3530
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7
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on 6 Mar 2020
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Anand Selvaraj
Answered
AD1933 8-Channel DAC
+1
1229
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1
reply
on 12 Feb 2020
by
DaveThib
Answered
TWI/I2C 21489 C code example
+1
5643
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16
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on 17 Jan 2020
by
Anand Selvaraj
Answered
UART DMA issue
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2597
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11
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on 8 Jan 2020
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Mr.Kristrnsen
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