Analog.com
Analog
Dialogue
Wiki
简体中文
EngineerZone
Search
Log in
Site
Search
Log in
Home
Blogs ⌵
EngineerZone Spotlight
The Engineering Mind
Browse ⌵
All Groups
All Members
Support ⌵
3D ToF Depth Sensing
Amplifiers
Analog Microcontrollers
Audio
Clock and Timing
Data Converters
Design Tools and Calculators
Direct Digital Synthesis (DDS)
Embedded Vision Sensing
Energy Monitoring and Metering
FPGA Reference Designs
Industrial Ethernet
Interface and Isolation
Low Power RF Transceivers
MeasureWare
MEMS Inertial Sensors
Motor Control Hardware Platforms
Optical Sensing
Power By Linear
Processors and DSP
Reference Circuits
RF and Microwave
Switches/Multiplexers
Temperature Sensors
Video
Wireless Sensor Networks Reference Library
My EZ
More
Cancel
Processors and DSP
More
SHARC Processors
Q&A
Discussions
Documents
File Uploads
Video/Images
Sub-Groups
Tags
Reports
More
Cancel
New
SHARC Processors requires membership for participation - click to join
Ask a Question
Community Blogs
EngineerZone Spotlight
The Engineering Mind
More
Cancel
Open Questions
SC589 delayed first SPORT DMA Data Interrupt
Not Answered
1 month ago
21469 Active noise cancellation example
Not Answered
3 days ago
Serial port interrupt fires too early after porting VDSP project to CCES
Not Answered
1 day ago
JP3 on ADSP-SC589 EZ
Not Answered
1 day ago
FPGA Memory
Not Answered
1 day ago
How to sync SPORT Tx and Rx
Not Answered
3 days ago
ADSP21569 Boot from sigma studio
Not Answered
10 days ago
Most Active Members
?
Click to read detailed help documentation on Telligent.com.
Discussions and FAQs on SHARC architecture, peripherals, programming, applications and hardware design. Please read
the
EngineerZone Code of Conduct
before posting.
Sub-Groups
ADSP-SC5xx/ADSP-215xx
EngineerZone technical forum that provides customer support for Analog Devices ADSP-SC5xx/ADSP-215xx products.
Dec 20, 2019 71859 members
Recent Content Q&A
Answered
Reference PCB Layout Available?
0
203
views
5
replies
on 7 Jan 2020
by
Anand Selvaraj
Not Answered
AD7671 interfacing with ADSP21369 using SPI protocol for SERIAL mode
0
93
views
1
reply
on 7 Jan 2020
by
Anand Selvaraj
Not Answered
how to configure ADSP-21479 SHARC processor in SPI slave mode
0
62
views
2
replies
on 30 Dec 2019
by
amu340
Not Answered
How to erase Flash in ADSP21489 Sharc processor
0
378
views
7
replies
on 27 Dec 2019
by
Anand Selvaraj
Not Answered
ADSP-21587 SHARC+ Static Memory Controller setup
0
338
views
3
replies
on 27 Dec 2019
by
Anand Selvaraj
Not Answered
Selective Booting using an internal variable
0
1604
views
8
replies
on 27 Dec 2019
by
Anand Selvaraj
Not Answered
how to configure ADSP-21479 SHARC processor in SPI slave mode
0
57
views
1
reply
on 27 Dec 2019
by
Anand Selvaraj
Not Answered
ethernet controller with SHARC 584
0
72
views
3
replies
on 27 Dec 2019
by
Anand Selvaraj
Not Answered
SPI_CLOCK init
0
36
views
1
reply
on 20 Dec 2019
by
Anand Selvaraj
Not Answered
what is the maximum speed of SPI clock with different PLL in ADSP21489
0
88
views
2
replies
on 20 Dec 2019
by
Anand Selvaraj
<
>
Featured Content Tagged Featured
There are no posts with the requested tag.
Answered Questions
Answered
PCG and I2S compliance when external clock = bit clock
+1
2547
views
5
replies
on 8 Jun 2019
by
LalithaS
Answered
ADSP-21369 EZKit expansion port question
+1
2018
views
3
replies
on 8 May 2019
by
ezadmin
Answered
Halt and restart SPORT DMA
0
679
views
3
replies
on 8 May 2019
by
ezadmin
Answered
SPI Slave Problem with ADSP 21469
0
710
views
2
replies
on 8 May 2019
by
ezadmin
Answered
VDK Thread Stack Overflow
0
557
views
3
replies
on 8 May 2019
by
ezadmin
<
>
Recent Activity
Filter
Show More