Problem with TS101 in emulation mode

Hi Konstantin,

          We have limited support for debugging the JTAG access related problem with different tools other than ADI. I could only see that this details are available under the "Debug Functionality" chapter on ADSP-TS101 HRM. Based on the information from the HRM, the IRFREE bit is set by default. In your code I am not sure why this bit is not set.  Also refer the below information on the ADSP-TS101 HRM on page 342:

Whenever the TigerSHARC processor is in emulation mode and ready for a new instruction line driven into the EMUIR  register, the EMU pin is driven low until such an instruction is inserted.

In your system, have you checked the EMU pin status to see what happens?

Best Regards,

Jeyanthi

Hi Konstantin,

               Thanks for the feedback. Since the EMU# pin is the output from processor which is used by the  Emulator or any other JTAG tool, I feel this is implicit that the EMUOE bit need to be set in the code. I will also make sure that this is explicitly added to the documentation.

Best Regards,

Jeyanthi

Hi Jeyanthi,

Thank you for your reply.

The problem is already solved: EMUOE bit in EMUCTL register not only controls behavior of EMU pin, but also behaviour of IRFREE bit (however this is not mentioned in HRM). So, in order to make IRFREE bit show whether EMUIR is ready for new instruction, EMUOE bit has to be set.

Best Regards,

Konstantin