I've got a problem with background DMA transfers and timer0 interrupts. I try to read data from external port according to timer0 interrupts and at the same time I use UART in autobuffer mode. In that case I read wrong buffer from external port, so DMA definitely has an impact on my main program.
Finally I have 3 interrupts in the program (timer0, tx, rx UART). Could someone explain to me what happens during simultaneous work DMA and other interrupts?
Thanks for help.
What processor are you using?
All questions regarding ADSP-2191M. I try simplifying the program. I use reading data from external port every 30 ms (only 10 bytes) for this purpose i use timer0 interrupts to count 30 ms (timer interrupt 25 mks). I use uart dma (autobuffer mode) only to receive data from PC (10 bytes every 100 ms). In this case I get a problem with external memory access, i get wrong buffer. I get one spurious read (11 instead of 10). The program works properly only few minutes then i get previously mentioned problems. This situation occurs only when i use uart dma for receiving data, when i use uart dma to transmit data to PC (continuous transmission 200 bytes) and at the same time i use reading data from external port then everything goes well. I try global disable interrupts during external port reading procedure in that case everything ok.
Are there any possibilities to avoid disabling interrupts?
Are there any restrictions on using external memory access and uart dma simultaneously?
Thank you for help with this matter.
As you have contacted Private support,Lets continue discussion there and post outcome here if appropriate.
Thank you for reply, but I'm not sure I understood your last message, so where am I supposed to post my questions?
But the point is I have no idea what to do with my project. All my last experiments I've posted in my last message, so could you tell me are there any mistakes in the project and what am I supposed to do with it?
This issue was discussed through private support. I was able to reproduce the problem with the simpler test case having only one interrupt. It appears that interrupts must be disabled before processor makes access to external port.