About the Timer2 Clear Register of ADuC7061

Hi,

In the ADuC7023 data sheet (Rev. F), p. 87, T2CLRI Register
"The user must perform successive writes to this register to ensureresetting the timeout period."
 is written.

On the other hand, it is not described in ADuC7061 data sheet (Rev. D) p. 71, Timer2 Clear Register.
In ADuC7061, is "successive writes" unnecessary?
(Is it OK with only writing once?)

  • 0
    •  Analog Employees 
    on Apr 16, 2018 1:53 PM

    Hi,

    I don't very clearly understand your question.

    If you use the timer2 as a watchdog timer. If T2VAL reaches 0, a reset or an interrupt occurs, depending on T2CON[1]. To avoid a reset or an interrupt event, any value must be written to T2CLRI before T2VAL reaches zero. This reloads the counter with T2LD and begins a new timeout period.

    If this don't answer your question, please share more information about your application.

  • Hi, barryzhang-san,

    Thank you for your reply.

    "successive writes" are required for the T2CLRI register of ADuC7023.

    Is "successive writes" unnecessary for the T2CLRI register of ADuC7061?

    There is no description of
    "The user must perform successive writes to this register to ensure resetting the timeout period."
    in the datasheet of ADuC7061.

  • 0
    •  Analog Employees 
    on Jun 29, 2018 7:54 AM

    Hi,

    As to the 'successive writes', since ADuC7061 datasheet doesn't mention it, you don't need to consider it.

    If you use the timer2 in ADuC7061 as a watchdog timer, just follow the description in ADuC7061 datasheet.

    If you use the timer2 in normal mode and want to reset the counter time, just write the value into the T2LD register before Timer2 overflow or T2CLRI is written.

    Thanks.

  • Hi, barryzhang-san,

     

    Thank you for your reply.

    It was settled by your advice.

    Best Regards,

    Okano