DS2477
Production
The DS2477 secure I²C coprocessor with built-in 1-Wire® master combines FIPS202-compliant secure hash algorithm (SHA-3) challenge and response authentication...
Datasheet
DS2477 on Analog.com
I put DS2477 on the I2C and thought it can work as regular i2c. But once I put 0x23 slave address it is NACK. lacking of information to use this chip , any help? thanks a lot. contact ADI to request info. weeks ago and got no response. won't use this chip in the future due to lacking of support. probably this chip was designed for some large firms but regular users.
code to testing ds2477:
/***********************************************************************************************************************
* Function Name: sci_i2c_hal_module_guide_project
* Description : Main function demonstrating this module
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void sci_iic_hal_module_DS2477_project(void)
{
ssp_err_t err;
// Enable load switches for all channels
printf("Enabling load switches...\r\n");
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_06, IOPORT_LEVEL_HIGH); // CH0 enable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_07, IOPORT_LEVEL_HIGH); // CH1 enable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_08, IOPORT_LEVEL_HIGH); // CH2 enable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_09, IOPORT_LEVEL_HIGH); // CH3 enable
R_BSP_SoftwareDelay(100, BSP_DELAY_UNITS_MILLISECONDS);
// Open I2C
err = g_i2c0.p_api->open(g_i2c0.p_ctrl, g_i2c0.p_cfg);
error_handle(err, "Open IIC0 Error");
uint8_t PCA9548slaveaddress = 0x70;
uint8_t DS2477slaveaddress = 0x00; // DS2477 at address 0x23
// Set PCA9548 slave address first
err = g_i2c0.p_api->slaveAddressSet(g_i2c0.p_ctrl, PCA9548slaveaddress, I2C_ADDR_MODE_7BIT);
error_handle(err, "slaveAddressSet PCA9548");
R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
// Main loop to communicate with DS2477 on Channel 0
while (1)
{
uint8_t write_buffer[8];
uint8_t read_buffer[8];
printf("=== DS2477 on Channel 0 (Address 0x23) ===\r\n");
// **CRITICAL FIX: Select PCA9548 Channel 0 FIRST**
// Set PCA9548 address again to ensure we're talking to mux
err = g_i2c0.p_api->slaveAddressSet(g_i2c0.p_ctrl, PCA9548slaveaddress, I2C_ADDR_MODE_7BIT);
if (err != SSP_SUCCESS) {
printf("PCA9548 address set error: 0x%02x\r\n", err);
continue;
}
// Select PCA9548 Channel 0
write_buffer[0] = 0x01; // Control register - enable ONLY channel 0
err = g_i2c0.p_api->write(g_i2c0.p_ctrl, write_buffer, 1, false);
if (err != SSP_SUCCESS) {
printf("PCA9548 Channel 0 select error: 0x%02x\r\n", err);
continue;
}
printf("Channel 0 selected for DS2477\r\n");
R_BSP_SoftwareDelay(2, BSP_DELAY_UNITS_MILLISECONDS);
// **IMPORTANT: Verify PCA9548 channel selection by reading back control register**
printf("Verifying PCA9548 channel selection...\r\n");
err = g_i2c0.p_api->read(g_i2c0.p_ctrl, read_buffer, 1, false);
if (err != SSP_SUCCESS) {
printf("PCA9548 readback error: 0x%02x\r\n", err);
} else {
printf("PCA9548 Control Register: 0x%02X\r\n", read_buffer[0]);
}
// Now set DS2477 slave address
err = g_i2c0.p_api->slaveAddressSet(g_i2c0.p_ctrl, DS2477slaveaddress, I2C_ADDR_MODE_7BIT);
if (err != SSP_SUCCESS) {
printf("DS2477 address set error: 0x%02x\r\n", err);
continue;
}
printf("DS2477 address 0x23 set successfully\r\n");
// **OPTION 1: READ STATUS REGISTER (0xAA) - CORRECTED**
printf("Reading Status Register (0xAA)...\r\n");
write_buffer[0] = 0x0;//0xAA; // Status register command
err = g_i2c0.p_api->write(g_i2c0.p_ctrl, write_buffer, 1, false);
if (err != SSP_SUCCESS) {
printf("DS2477 status command write error: 0x%02x\r\n", err);
} else {
// Read status register (1 byte)
err = g_i2c0.p_api->read(g_i2c0.p_ctrl, read_buffer, 1, false);
if (err != SSP_SUCCESS) {
printf("DS2477 status read error: 0x%02x\r\n", err);
} else {
uint8_t status = read_buffer[0];
printf("DS2477 Status Register: 0x%02X\r\n", status);
printf(" PIO State: %s\r\n", (status & 0x01) ? "HIGH" : "LOW");
printf(" Strong Pullup: %s\r\n", (status & 0x02) ? "ENABLED" : "DISABLED");
printf(" PIO Output: %s\r\n", (status & 0x04) ? "ACTIVE" : "INACTIVE");
printf(" Power-on Reset: %s\r\n", (status & 0x08) ? "DETECTED" : "NORMAL");
printf(" Single Bit Result: %s\r\n", (status & 0x10) ? "1" : "0");
printf(" Trip Detect: %s\r\n", (status & 0x20) ? "TRIPPED" : "NORMAL");
printf(" 1-Wire Short: %s\r\n", (status & 0x40) ? "DETECTED" : "NORMAL");
printf(" Logic Level: %s\r\n", (status & 0x80) ? "HIGH" : "LOW");
}
}
// Wait before next read
R_BSP_SoftwareDelay(1000, BSP_DELAY_UNITS_MILLISECONDS);
}
// Close I2C (this won't be reached in infinite loop)
err = g_i2c0.p_api->close(g_i2c0.p_ctrl);
error_handle(err, "Close IIC0 Error");
// Disable load switches when done
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_06, IOPORT_LEVEL_LOW); // CH0 disable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_07, IOPORT_LEVEL_LOW); // CH1 disable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_08, IOPORT_LEVEL_LOW); // CH2 disable
g_ioport.p_api->pinWrite(IOPORT_PORT_08_PIN_09, IOPORT_LEVEL_LOW); // CH3 disable
}